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Searched refs:mmMP0_SMN_C2PMSG_33 (Results 1 – 9 of 9) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/mp/
Dmp_10_0_offset.h30 #define mmMP0_SMN_C2PMSG_33 … macro
Dmp_12_0_0_offset.h30 #define mmMP0_SMN_C2PMSG_33 … macro
Dmp_11_0_8_offset.h30 #define mmMP0_SMN_C2PMSG_33 … macro
Dmp_11_0_offset.h30 #define mmMP0_SMN_C2PMSG_33 … macro
Dmp_9_0_offset.h30 #define mmMP0_SMN_C2PMSG_33 0x0061 macro
Dmp_11_5_0_offset.h30 #define mmMP0_SMN_C2PMSG_33 … macro
/linux-6.1.9/drivers/gpu/drm/amd/amdgpu/
Dpsp_v3_1.c360 offset = SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_33); in psp_v3_1_mode1_reset()
Dpsp_v12_0.c386 offset = SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_33); in psp_v12_0_mode1_reset()
Dpsp_v11_0.c524 offset = SOC15_REG_OFFSET(MP0, 0, mmMP0_SMN_C2PMSG_33); in psp_v11_0_mode1_reset()