Searched refs:mmIH_RB_CNTL_RING2 (Results 1 – 7 of 7) sorted by relevance
| /linux-6.1.9/drivers/gpu/drm/amd/amdgpu/ |
| D | navi10_ih.c | 81 ih_regs->ih_rb_cntl = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_CNTL_RING2); in navi10_ih_init_register_offset()
130 ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING2); in force_update_wptr_for_self_int()
137 WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING2, ih_rb_cntl); in force_update_wptr_for_self_int()
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| D | vega10_ih.c | 79 ih_regs->ih_rb_cntl = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_CNTL_RING2); in vega10_ih_init_register_offset()
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| D | vega20_ih.c | 82 ih_regs->ih_rb_cntl = SOC15_REG_OFFSET(OSSSYS, 0, mmIH_RB_CNTL_RING2); in vega20_ih_init_register_offset()
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| /linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/oss/ |
| D | osssys_4_0_1_offset.h | 148 #define mmIH_RB_CNTL_RING2 … macro
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| D | osssys_4_0_offset.h | 148 #define mmIH_RB_CNTL_RING2 … macro
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| D | osssys_4_2_0_offset.h | 150 #define mmIH_RB_CNTL_RING2 … macro
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| D | osssys_5_0_0_offset.h | 148 #define mmIH_RB_CNTL_RING2 … macro
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