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Searched refs:mmDP1_DP_SEC_AUD_M (Results 1 – 14 of 14) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h3198 #define mmDP1_DP_SEC_AUD_M 0x1FA7 macro
Ddce_8_0_d.h4069 #define mmDP1_DP_SEC_AUD_M 0x1fa7 macro
Ddce_10_0_d.h4701 #define mmDP1_DP_SEC_AUD_M 0x4bcb macro
Ddce_11_0_d.h4748 #define mmDP1_DP_SEC_AUD_M 0x4bcb macro
Ddce_11_2_d.h5980 #define mmDP1_DP_SEC_AUD_M 0x4bcb macro
Ddce_12_0_offset.h10558 #define mmDP1_DP_SEC_AUD_M … macro
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_3_offset.h5858 #define mmDP1_DP_SEC_AUD_M … macro
Ddcn_3_0_3_offset.h5367 #define mmDP1_DP_SEC_AUD_M … macro
Ddcn_3_0_1_offset.h8334 #define mmDP1_DP_SEC_AUD_M … macro
Ddcn_1_0_offset.h8733 #define mmDP1_DP_SEC_AUD_M … macro
Ddcn_2_1_0_offset.h10257 #define mmDP1_DP_SEC_AUD_M … macro
Ddcn_3_0_2_offset.h9949 #define mmDP1_DP_SEC_AUD_M … macro
Ddcn_2_0_0_offset.h11348 #define mmDP1_DP_SEC_AUD_M … macro
Ddcn_3_0_0_offset.h11084 #define mmDP1_DP_SEC_AUD_M … macro