Searched refs:mmCRTC_MASTER_UPDATE_MODE (Results 1 – 6 of 6) sorted by relevance
| /linux-6.1.9/drivers/gpu/drm/amd/display/dc/dce112/ |
| D | dce112_hw_sequencer.c | 142 HW_REG_CRTC(mmCRTC_MASTER_UPDATE_MODE, controller_id), in dce112_enable_display_power_gating()
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| /linux-6.1.9/drivers/gpu/drm/amd/display/dc/dce110/ |
| D | dce110_timing_generator.c | 140 dm_write_reg(tg->ctx, CRTC_REG(mmCRTC_MASTER_UPDATE_MODE), value); in dce110_timing_generator_enable_crtc()
1701 value = dm_read_reg(tg->ctx, CRTC_REG(mmCRTC_MASTER_UPDATE_MODE)); in dce110_timing_generator_enable_crtc_reset()
1708 dm_write_reg(tg->ctx, CRTC_REG(mmCRTC_MASTER_UPDATE_MODE), value); in dce110_timing_generator_enable_crtc_reset()
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| D | dce110_hw_sequencer.c | 241 HW_REG_CRTC(mmCRTC_MASTER_UPDATE_MODE, controller_id), in dce110_enable_display_power_gating()
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| /linux-6.1.9/drivers/gpu/drm/amd/amdgpu/ |
| D | dce_v11_0.c | 2119 WREG32(mmCRTC_MASTER_UPDATE_MODE + amdgpu_crtc->crtc_offset, 0); in dce_v11_0_crtc_do_set_base()
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| /linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/dce/ |
| D | dce_11_0_d.h | 539 #define mmCRTC_MASTER_UPDATE_MODE 0x1bbe macro
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| D | dce_11_2_d.h | 546 #define mmCRTC_MASTER_UPDATE_MODE 0x1bbe macro
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