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Searched refs:mmCP_RB_DOORBELL_CONTROL (Results 1 – 10 of 10) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_8_0_d.h266 #define mmCP_RB_DOORBELL_CONTROL 0x3059 macro
Dgfx_8_1_d.h267 #define mmCP_RB_DOORBELL_CONTROL 0x3059 macro
/linux-6.1.9/drivers/gpu/drm/amd/amdgpu/
Dgfx_v10_0.c6110 tmp = RREG32_SOC15(GC, 0, mmCP_RB_DOORBELL_CONTROL); in gfx_v10_0_cp_gfx_set_doorbell()
6120 WREG32_SOC15(GC, 0, mmCP_RB_DOORBELL_CONTROL, tmp); in gfx_v10_0_cp_gfx_set_doorbell()
6485 tmp = RREG32_SOC15(GC, 0, mmCP_RB_DOORBELL_CONTROL); in gfx_v10_0_gfx_mqd_init()
6545 WREG32_SOC15(GC, 0, mmCP_RB_DOORBELL_CONTROL, mqd->cp_rb_doorbell_control); in gfx_v10_0_gfx_queue_init_register()
Dgfx_v9_0.c3160 tmp = RREG32_SOC15(GC, 0, mmCP_RB_DOORBELL_CONTROL); in gfx_v9_0_cp_gfx_resume()
3169 WREG32_SOC15(GC, 0, mmCP_RB_DOORBELL_CONTROL, tmp); in gfx_v9_0_cp_gfx_resume()
Dgfx_v8_0.c4235 tmp = RREG32(mmCP_RB_DOORBELL_CONTROL); in gfx_v8_0_set_cpg_door_bell()
4248 WREG32(mmCP_RB_DOORBELL_CONTROL, tmp); in gfx_v8_0_set_cpg_door_bell()
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h2434 #define mmCP_RB_DOORBELL_CONTROL macro
Dgc_9_1_offset.h2711 #define mmCP_RB_DOORBELL_CONTROL macro
Dgc_9_2_1_offset.h2649 #define mmCP_RB_DOORBELL_CONTROL macro
Dgc_10_1_0_offset.h5029 #define mmCP_RB_DOORBELL_CONTROL macro
Dgc_10_3_0_offset.h4686 #define mmCP_RB_DOORBELL_CONTROL macro