Home
last modified time | relevance | path

Searched refs:mmCP_INT_CNTL_RING2_BASE_IDX (Results 1 – 5 of 5) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h2473 #define mmCP_INT_CNTL_RING2_BASE_IDX macro
Dgc_9_1_offset.h2750 #define mmCP_INT_CNTL_RING2_BASE_IDX macro
Dgc_9_2_1_offset.h2688 #define mmCP_INT_CNTL_RING2_BASE_IDX macro
Dgc_10_1_0_offset.h4812 #define mmCP_INT_CNTL_RING2_BASE_IDX macro
Dgc_10_3_0_offset.h4463 #define mmCP_INT_CNTL_RING2_BASE_IDX macro