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Searched refs:mmCP_HQD_PQ_RPTR_REPORT_ADDR_HI (Results 1 – 12 of 12) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/amdgpu/
Dmes_v10_1.c854 WREG32_SOC15(GC, 0, mmCP_HQD_PQ_RPTR_REPORT_ADDR_HI,
Dgfx_v9_0.c3463 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_RPTR_REPORT_ADDR_HI, in gfx_v9_0_kiq_init_register()
Dgfx_v10_0.c6848 WREG32_SOC15(GC, 0, mmCP_HQD_PQ_RPTR_REPORT_ADDR_HI, in gfx_v10_0_kiq_init_register()
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_0_d.h579 #define mmCP_HQD_PQ_RPTR_REPORT_ADDR_HI 0x3251 macro
Dgfx_7_2_d.h592 #define mmCP_HQD_PQ_RPTR_REPORT_ADDR_HI 0x3251 macro
Dgfx_8_0_d.h642 #define mmCP_HQD_PQ_RPTR_REPORT_ADDR_HI 0x3251 macro
Dgfx_8_1_d.h642 #define mmCP_HQD_PQ_RPTR_REPORT_ADDR_HI 0x3251 macro
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h2843 #define mmCP_HQD_PQ_RPTR_REPORT_ADDR_HI … macro
Dgc_9_1_offset.h3071 #define mmCP_HQD_PQ_RPTR_REPORT_ADDR_HI … macro
Dgc_9_2_1_offset.h3027 #define mmCP_HQD_PQ_RPTR_REPORT_ADDR_HI … macro
Dgc_10_1_0_offset.h5307 #define mmCP_HQD_PQ_RPTR_REPORT_ADDR_HI … macro
Dgc_10_3_0_offset.h4946 #define mmCP_HQD_PQ_RPTR_REPORT_ADDR_HI … macro