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Searched refs:mmCP_HQD_PQ_RPTR (Results 1 – 14 of 14) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/pm/powerplay/inc/
Dpolaris10_pwrvirus.h1546 { 0x00000000, mmCP_HQD_PQ_RPTR },
1551 { 0x00000000, mmCP_HQD_PQ_RPTR },
1556 { 0x00000000, mmCP_HQD_PQ_RPTR },
1561 { 0x00000000, mmCP_HQD_PQ_RPTR },
1566 { 0x00000000, mmCP_HQD_PQ_RPTR },
1571 { 0x00000000, mmCP_HQD_PQ_RPTR },
1576 { 0x00000000, mmCP_HQD_PQ_RPTR },
1581 { 0x00000000, mmCP_HQD_PQ_RPTR },
1586 { 0x00000000, mmCP_HQD_PQ_RPTR },
1591 { 0x00000000, mmCP_HQD_PQ_RPTR },
[all …]
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_0_d.h577 #define mmCP_HQD_PQ_RPTR 0x324f macro
Dgfx_7_2_d.h590 #define mmCP_HQD_PQ_RPTR 0x324f macro
Dgfx_8_0_d.h640 #define mmCP_HQD_PQ_RPTR 0x324f macro
Dgfx_8_1_d.h640 #define mmCP_HQD_PQ_RPTR 0x324f macro
/linux-6.1.9/drivers/gpu/drm/amd/amdgpu/
Dgfx_v7_0.c2880 WREG32(mmCP_HQD_PQ_RPTR, 0); in gfx_v7_0_mqd_deactivate()
2980 mqd->cp_hqd_pq_rptr = RREG32(mmCP_HQD_PQ_RPTR); in gfx_v7_0_mqd_init()
2997 mqd->cp_hqd_pq_rptr = RREG32(mmCP_HQD_PQ_RPTR); in gfx_v7_0_mqd_init()
Dgfx_v9_0.c3373 mqd->cp_hqd_pq_rptr = RREG32_SOC15(GC, 0, mmCP_HQD_PQ_RPTR); in gfx_v9_0_mqd_init()
3432 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_RPTR, in gfx_v9_0_kiq_init_register()
3546 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_RPTR, 0); in gfx_v9_0_kiq_fini_register()
Dgfx_v8_0.c4418 WREG32(mmCP_HQD_PQ_RPTR, 0); in gfx_v8_0_deactivate_hqd()
4534 mqd->cp_hqd_pq_rptr = RREG32(mmCP_HQD_PQ_RPTR); in gfx_v8_0_mqd_init()
Dgfx_v10_0.c6758 mqd->cp_hqd_pq_rptr = RREG32_SOC15(GC, 0, mmCP_HQD_PQ_RPTR); in gfx_v10_0_compute_mqd_init()
6804 WREG32_SOC15(GC, 0, mmCP_HQD_PQ_RPTR, in gfx_v10_0_kiq_init_register()
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h2839 #define mmCP_HQD_PQ_RPTR macro
Dgc_9_1_offset.h3067 #define mmCP_HQD_PQ_RPTR macro
Dgc_9_2_1_offset.h3023 #define mmCP_HQD_PQ_RPTR macro
Dgc_10_1_0_offset.h5303 #define mmCP_HQD_PQ_RPTR macro
Dgc_10_3_0_offset.h4942 #define mmCP_HQD_PQ_RPTR macro