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Searched refs:mmCP_CPC_IC_BASE_LO (Results 1 – 11 of 11) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/pm/powerplay/inc/
Dpolaris10_pwrvirus.h58 { 0x540ff000, mmCP_CPC_IC_BASE_LO },
/linux-6.1.9/drivers/gpu/drm/amd/pm/powerplay/smumgr/
Dsmu8_smumgr.c208 cgs_write_register(hwmgr->device, mmCP_CPC_IC_BASE_LO, reg_data); in smu8_load_mec_firmware()
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_8_0_d.h346 #define mmCP_CPC_IC_BASE_LO 0x30b9 macro
Dgfx_8_1_d.h346 #define mmCP_CPC_IC_BASE_LO 0x30b9 macro
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h2603 #define mmCP_CPC_IC_BASE_LO macro
Dgc_9_1_offset.h2873 #define mmCP_CPC_IC_BASE_LO macro
Dgc_9_2_1_offset.h2807 #define mmCP_CPC_IC_BASE_LO macro
Dgc_10_1_0_offset.h10259 #define mmCP_CPC_IC_BASE_LO macro
Dgc_10_3_0_offset.h9985 #define mmCP_CPC_IC_BASE_LO macro
/linux-6.1.9/drivers/gpu/drm/amd/amdgpu/
Dgfx_v10_0.c5670 WREG32_SOC15(GC, 0, mmCP_CPC_IC_BASE_LO, in gfx_v10_0_rlc_backdoor_autoload_config_mec_cache()
6349 WREG32_SOC15(GC, 0, mmCP_CPC_IC_BASE_LO, adev->gfx.mec.mec_fw_gpu_addr & in gfx_v10_0_cp_compute_load_microcode()
Dgfx_v9_0.c3221 WREG32_SOC15(GC, 0, mmCP_CPC_IC_BASE_LO, in gfx_v9_0_cp_compute_load_microcode()