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Searched refs:mmCC_GC_SHADER_ARRAY_CONFIG (Results 1 – 15 of 15) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_d.h291 #define mmCC_GC_SHADER_ARRAY_CONFIG 0x226F macro
Dgfx_7_0_d.h2337 #define mmCC_GC_SHADER_ARRAY_CONFIG 0x226f macro
Dgfx_7_2_d.h2361 #define mmCC_GC_SHADER_ARRAY_CONFIG 0x226f macro
Dgfx_8_0_d.h2601 #define mmCC_GC_SHADER_ARRAY_CONFIG 0x226f macro
Dgfx_8_1_d.h2580 #define mmCC_GC_SHADER_ARRAY_CONFIG 0x226f macro
/linux-6.1.9/drivers/gpu/drm/amd/amdgpu/
Dgfx_v6_0.c1535 data = RREG32(mmCC_GC_SHADER_ARRAY_CONFIG) | in gfx_v6_0_get_cu_enabled()
Dgfx_v7_0.c3807 data = RREG32(mmCC_GC_SHADER_ARRAY_CONFIG); in gfx_v7_0_get_cu_active_bitmap()
Dgfx_v9_0.c6928 data = RREG32_SOC15(GC, 0, mmCC_GC_SHADER_ARRAY_CONFIG); in gfx_v9_0_get_cu_active_bitmap()
Dgfx_v8_0.c7113 data = RREG32(mmCC_GC_SHADER_ARRAY_CONFIG) | in gfx_v8_0_get_cu_active_bitmap()
Dgfx_v10_0.c9575 efuse_setting = RREG32_SOC15(GC, 0, mmCC_GC_SHADER_ARRAY_CONFIG); in gfx_v10_0_get_wgp_active_bitmap_per_sh()
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h319 #define mmCC_GC_SHADER_ARRAY_CONFIG macro
Dgc_9_1_offset.h315 #define mmCC_GC_SHADER_ARRAY_CONFIG macro
Dgc_9_2_1_offset.h309 #define mmCC_GC_SHADER_ARRAY_CONFIG macro
Dgc_10_1_0_offset.h2341 #define mmCC_GC_SHADER_ARRAY_CONFIG macro
Dgc_10_3_0_offset.h2428 #define mmCC_GC_SHADER_ARRAY_CONFIG macro