1 /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */ 2 /* Copyright (c) 2020 Mellanox Technologies Ltd */ 3 4 #ifndef __MLX5_IFC_VHCA_EVENT_H__ 5 #define __MLX5_IFC_VHCA_EVENT_H__ 6 7 enum mlx5_ifc_vhca_state { 8 MLX5_VHCA_STATE_INVALID = 0x0, 9 MLX5_VHCA_STATE_ALLOCATED = 0x1, 10 MLX5_VHCA_STATE_ACTIVE = 0x2, 11 MLX5_VHCA_STATE_IN_USE = 0x3, 12 MLX5_VHCA_STATE_TEARDOWN_REQUEST = 0x4, 13 }; 14 15 struct mlx5_ifc_vhca_state_context_bits { 16 u8 arm_change_event[0x1]; 17 u8 reserved_at_1[0xb]; 18 u8 vhca_state[0x4]; 19 u8 reserved_at_10[0x10]; 20 21 u8 sw_function_id[0x20]; 22 23 u8 reserved_at_40[0x40]; 24 }; 25 26 struct mlx5_ifc_query_vhca_state_out_bits { 27 u8 status[0x8]; 28 u8 reserved_at_8[0x18]; 29 30 u8 syndrome[0x20]; 31 32 u8 reserved_at_40[0x40]; 33 34 struct mlx5_ifc_vhca_state_context_bits vhca_state_context; 35 }; 36 37 struct mlx5_ifc_query_vhca_state_in_bits { 38 u8 opcode[0x10]; 39 u8 uid[0x10]; 40 41 u8 reserved_at_20[0x10]; 42 u8 op_mod[0x10]; 43 44 u8 embedded_cpu_function[0x1]; 45 u8 reserved_at_41[0xf]; 46 u8 function_id[0x10]; 47 48 u8 reserved_at_60[0x20]; 49 }; 50 51 struct mlx5_ifc_vhca_state_field_select_bits { 52 u8 reserved_at_0[0x1e]; 53 u8 sw_function_id[0x1]; 54 u8 arm_change_event[0x1]; 55 }; 56 57 struct mlx5_ifc_modify_vhca_state_out_bits { 58 u8 status[0x8]; 59 u8 reserved_at_8[0x18]; 60 61 u8 syndrome[0x20]; 62 63 u8 reserved_at_40[0x40]; 64 }; 65 66 struct mlx5_ifc_modify_vhca_state_in_bits { 67 u8 opcode[0x10]; 68 u8 uid[0x10]; 69 70 u8 reserved_at_20[0x10]; 71 u8 op_mod[0x10]; 72 73 u8 embedded_cpu_function[0x1]; 74 u8 reserved_at_41[0xf]; 75 u8 function_id[0x10]; 76 77 struct mlx5_ifc_vhca_state_field_select_bits vhca_state_field_select; 78 79 struct mlx5_ifc_vhca_state_context_bits vhca_state_context; 80 }; 81 82 #endif 83