Searched refs:minimum_clocks (Results 1 – 2 of 2) sorted by relevance
3244 struct PP_Clocks minimum_clocks = {0}; in vega10_apply_state_adjust_rules() local3284 minimum_clocks.engineClock = hwmgr->display_config->min_core_set_clock; in vega10_apply_state_adjust_rules()3285 minimum_clocks.memoryClock = hwmgr->display_config->min_mem_set_clock; in vega10_apply_state_adjust_rules()3315 minimum_clocks.engineClock = stable_pstate_sclk; in vega10_apply_state_adjust_rules()3316 minimum_clocks.memoryClock = stable_pstate_mclk; in vega10_apply_state_adjust_rules()3337 if (sclk < minimum_clocks.engineClock) in vega10_apply_state_adjust_rules()3338 sclk = (minimum_clocks.engineClock > max_limits->sclk) ? in vega10_apply_state_adjust_rules()3339 max_limits->sclk : minimum_clocks.engineClock; in vega10_apply_state_adjust_rules()3341 if (mclk < minimum_clocks.memoryClock) in vega10_apply_state_adjust_rules()3342 mclk = (minimum_clocks.memoryClock > max_limits->mclk) ? in vega10_apply_state_adjust_rules()[all …]
3280 struct PP_Clocks minimum_clocks = {0}; in smu7_apply_state_adjust_rules() local3312 minimum_clocks.engineClock = hwmgr->display_config->min_core_set_clock; in smu7_apply_state_adjust_rules()3313 minimum_clocks.memoryClock = hwmgr->display_config->min_mem_set_clock; in smu7_apply_state_adjust_rules()3335 minimum_clocks.engineClock = stable_pstate_sclk; in smu7_apply_state_adjust_rules()3336 minimum_clocks.memoryClock = stable_pstate_mclk; in smu7_apply_state_adjust_rules()3367 if (sclk < minimum_clocks.engineClock) in smu7_apply_state_adjust_rules()3368 sclk = (minimum_clocks.engineClock > max_limits->sclk) ? in smu7_apply_state_adjust_rules()3369 max_limits->sclk : minimum_clocks.engineClock; in smu7_apply_state_adjust_rules()3371 if (mclk < minimum_clocks.memoryClock) in smu7_apply_state_adjust_rules()3372 mclk = (minimum_clocks.memoryClock > max_limits->mclk) ? in smu7_apply_state_adjust_rules()[all …]