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Searched refs:min_dst_y_next_start (Results 1 – 17 of 17) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn32/
Ddisplay_rq_dlg_calc_32.c229 unsigned int min_dst_y_next_start; in dml32_rq_dlg_get_dlg_reg() local
280 min_dst_y_next_start = get_min_dst_y_next_start(mode_lib, e2e_pipe_param, num_pipes, pipe_idx); in dml32_rq_dlg_get_dlg_reg()
283 dml_print("DML_DLG: %s: min_dst_y_next_start = %d\n", __func__, min_dst_y_next_start); in dml32_rq_dlg_get_dlg_reg()
441 dlg_regs->min_dst_y_next_start = min_dst_y_next_start * dml_pow(2, 2); in dml32_rq_dlg_get_dlg_reg()
442 ASSERT(dlg_regs->min_dst_y_next_start < (unsigned int)dml_pow(2, 18)); in dml32_rq_dlg_get_dlg_reg()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn21/
Ddcn21_hubp.c359 MIN_DST_Y_NEXT_START, &dlg_attr.min_dst_y_next_start); in hubp21_validate_dml_output()
374 if (dlg_attr.min_dst_y_next_start != dml_dlg_attr->min_dst_y_next_start) in hubp21_validate_dml_output()
376 dml_dlg_attr->min_dst_y_next_start, dlg_attr.min_dst_y_next_start); in hubp21_validate_dml_output()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_hubp.c92 MIN_DST_Y_NEXT_START, dlg_attr->min_dst_y_next_start); in hubp2_program_deadline()
1133 MIN_DST_Y_NEXT_START, &dlg_attr->min_dst_y_next_start); in hubp2_read_state_common()
1437 MIN_DST_Y_NEXT_START, &dlg_attr.min_dst_y_next_start); in hubp2_validate_dml_output()
1452 if (dlg_attr.min_dst_y_next_start != dml_dlg_attr->min_dst_y_next_start) in hubp2_validate_dml_output()
1454 dml_dlg_attr->min_dst_y_next_start, dlg_attr.min_dst_y_next_start); in hubp2_validate_dml_output()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn314/
Ddisplay_rq_dlg_calc_314.c1080 disp_dlg_regs->optimized_min_dst_y_next_start = disp_dlg_regs->min_dst_y_next_start; in dml_rq_dlg_get_dlg_params()
1082 disp_dlg_regs->min_dst_y_next_start = (unsigned int) (((double) dlg_vblank_start) * dml_pow(2, 2)); in dml_rq_dlg_get_dlg_params()
1089 disp_dlg_regs->min_dst_y_next_start = disp_dlg_regs->optimized_min_dst_y_next_start; in dml_rq_dlg_get_dlg_params()
1091 ASSERT(disp_dlg_regs->min_dst_y_next_start < (unsigned int)dml_pow(2, 18)); in dml_rq_dlg_get_dlg_params()
1094 …ML_DLG: %s: min_dst_y_next_start = 0x%0x\n", __func__, disp_dlg_regs->min_dst_y_next_start); in dml_rq_dlg_get_dlg_params()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/
Ddisplay_rq_dlg_helpers.c203 dlg_regs->min_dst_y_next_start); in print__dlg_regs_st()
Ddisplay_mode_structs.h620 unsigned int min_dst_y_next_start; member
Ddml1_display_rq_dlg_calc.c1175 disp_dlg_regs->min_dst_y_next_start = (unsigned int) (((double) dlg_vblank_start in dml1_rq_dlg_get_dlg_params()
1177 ASSERT(disp_dlg_regs->min_dst_y_next_start < (unsigned int) dml_pow(2, 18)); in dml1_rq_dlg_get_dlg_params()
1189 disp_dlg_regs->min_dst_y_next_start); in dml1_rq_dlg_get_dlg_params()
Ddisplay_mode_vba.h143 dml_get_pipe_attr_decl(min_dst_y_next_start);
Ddisplay_mode_vba.c183 dml_get_pipe_attr_func(min_dst_y_next_start, mode_lib->vba.MIN_DST_Y_NEXT_START);
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn31/
Ddisplay_rq_dlg_calc_31.c990 disp_dlg_regs->min_dst_y_next_start = (unsigned int) (((double) dlg_vblank_start) * dml_pow(2, 2)); in dml_rq_dlg_get_dlg_params()
992 disp_dlg_regs->optimized_min_dst_y_next_start = disp_dlg_regs->min_dst_y_next_start; in dml_rq_dlg_get_dlg_params()
993 ASSERT(disp_dlg_regs->min_dst_y_next_start < (unsigned int)dml_pow(2, 18)); in dml_rq_dlg_get_dlg_params()
996 …ML_DLG: %s: min_dst_y_next_start = 0x%0x\n", __func__, disp_dlg_regs->min_dst_y_next_start); in dml_rq_dlg_get_dlg_params()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn20/
Ddisplay_rq_dlg_calc_20.c945 disp_dlg_regs->min_dst_y_next_start = (unsigned int) ((double) dlg_vblank_start * dml_pow(2, 2)); in dml20_rq_dlg_get_dlg_params()
946 ASSERT(disp_dlg_regs->min_dst_y_next_start < (unsigned int) dml_pow(2, 18)); in dml20_rq_dlg_get_dlg_params()
962 disp_dlg_regs->min_dst_y_next_start); in dml20_rq_dlg_get_dlg_params()
Ddisplay_rq_dlg_calc_20v2.c945 disp_dlg_regs->min_dst_y_next_start = (unsigned int) (((double) dlg_vblank_start in dml20v2_rq_dlg_get_dlg_params()
947 ASSERT(disp_dlg_regs->min_dst_y_next_start < (unsigned int) dml_pow(2, 18)); in dml20v2_rq_dlg_get_dlg_params()
963 disp_dlg_regs->min_dst_y_next_start); in dml20v2_rq_dlg_get_dlg_params()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn21/
Ddisplay_rq_dlg_calc_21.c991 disp_dlg_regs->min_dst_y_next_start = (unsigned int) (((double) dlg_vblank_start) * dml_pow(2, 2)); in dml_rq_dlg_get_dlg_params()
992 ASSERT(disp_dlg_regs->min_dst_y_next_start < (unsigned int)dml_pow(2, 18)); in dml_rq_dlg_get_dlg_params()
1013 disp_dlg_regs->min_dst_y_next_start); in dml_rq_dlg_get_dlg_params()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn30/
Ddisplay_rq_dlg_calc_30.c1058 disp_dlg_regs->min_dst_y_next_start = (unsigned int)(((double)dlg_vblank_start in dml_rq_dlg_get_dlg_params()
1060 ASSERT(disp_dlg_regs->min_dst_y_next_start < (unsigned int)dml_pow(2, 18)); in dml_rq_dlg_get_dlg_params()
1076 disp_dlg_regs->min_dst_y_next_start); in dml_rq_dlg_get_dlg_params()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_hubp.c599 MIN_DST_Y_NEXT_START, dlg_attr->min_dst_y_next_start); in hubp1_program_deadline()
908 MIN_DST_Y_NEXT_START, &dlg_attr->min_dst_y_next_start); in hubp1_read_state_common()
Ddcn10_hw_sequencer_debug.c260 …s[i]->inst, dlg_regs->refcyc_h_blank_end, dlg_regs->dlg_vblank_end, dlg_regs->min_dst_y_next_start, in dcn10_get_dlg_states()
Ddcn10_hw_sequencer.c240 …s[i]->inst, dlg_regs->refcyc_h_blank_end, dlg_regs->dlg_vblank_end, dlg_regs->min_dst_y_next_start, in dcn10_log_hubp_states()