/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
D | display_rq_dlg_calc_32.c | 229 unsigned int min_dst_y_next_start; in dml32_rq_dlg_get_dlg_reg() local 280 min_dst_y_next_start = get_min_dst_y_next_start(mode_lib, e2e_pipe_param, num_pipes, pipe_idx); in dml32_rq_dlg_get_dlg_reg() 283 dml_print("DML_DLG: %s: min_dst_y_next_start = %d\n", __func__, min_dst_y_next_start); in dml32_rq_dlg_get_dlg_reg() 441 dlg_regs->min_dst_y_next_start = min_dst_y_next_start * dml_pow(2, 2); in dml32_rq_dlg_get_dlg_reg() 442 ASSERT(dlg_regs->min_dst_y_next_start < (unsigned int)dml_pow(2, 18)); in dml32_rq_dlg_get_dlg_reg()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn21/ |
D | dcn21_hubp.c | 359 MIN_DST_Y_NEXT_START, &dlg_attr.min_dst_y_next_start); in hubp21_validate_dml_output() 374 if (dlg_attr.min_dst_y_next_start != dml_dlg_attr->min_dst_y_next_start) in hubp21_validate_dml_output() 376 dml_dlg_attr->min_dst_y_next_start, dlg_attr.min_dst_y_next_start); in hubp21_validate_dml_output()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn20/ |
D | dcn20_hubp.c | 92 MIN_DST_Y_NEXT_START, dlg_attr->min_dst_y_next_start); in hubp2_program_deadline() 1133 MIN_DST_Y_NEXT_START, &dlg_attr->min_dst_y_next_start); in hubp2_read_state_common() 1437 MIN_DST_Y_NEXT_START, &dlg_attr.min_dst_y_next_start); in hubp2_validate_dml_output() 1452 if (dlg_attr.min_dst_y_next_start != dml_dlg_attr->min_dst_y_next_start) in hubp2_validate_dml_output() 1454 dml_dlg_attr->min_dst_y_next_start, dlg_attr.min_dst_y_next_start); in hubp2_validate_dml_output()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
D | display_rq_dlg_calc_314.c | 1080 disp_dlg_regs->optimized_min_dst_y_next_start = disp_dlg_regs->min_dst_y_next_start; in dml_rq_dlg_get_dlg_params() 1082 disp_dlg_regs->min_dst_y_next_start = (unsigned int) (((double) dlg_vblank_start) * dml_pow(2, 2)); in dml_rq_dlg_get_dlg_params() 1089 disp_dlg_regs->min_dst_y_next_start = disp_dlg_regs->optimized_min_dst_y_next_start; in dml_rq_dlg_get_dlg_params() 1091 ASSERT(disp_dlg_regs->min_dst_y_next_start < (unsigned int)dml_pow(2, 18)); in dml_rq_dlg_get_dlg_params() 1094 …ML_DLG: %s: min_dst_y_next_start = 0x%0x\n", __func__, disp_dlg_regs->min_dst_y_next_start); in dml_rq_dlg_get_dlg_params()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/ |
D | display_rq_dlg_helpers.c | 203 dlg_regs->min_dst_y_next_start); in print__dlg_regs_st()
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D | display_mode_structs.h | 620 unsigned int min_dst_y_next_start; member
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D | dml1_display_rq_dlg_calc.c | 1175 disp_dlg_regs->min_dst_y_next_start = (unsigned int) (((double) dlg_vblank_start in dml1_rq_dlg_get_dlg_params() 1177 ASSERT(disp_dlg_regs->min_dst_y_next_start < (unsigned int) dml_pow(2, 18)); in dml1_rq_dlg_get_dlg_params() 1189 disp_dlg_regs->min_dst_y_next_start); in dml1_rq_dlg_get_dlg_params()
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D | display_mode_vba.h | 143 dml_get_pipe_attr_decl(min_dst_y_next_start);
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D | display_mode_vba.c | 183 dml_get_pipe_attr_func(min_dst_y_next_start, mode_lib->vba.MIN_DST_Y_NEXT_START);
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
D | display_rq_dlg_calc_31.c | 990 disp_dlg_regs->min_dst_y_next_start = (unsigned int) (((double) dlg_vblank_start) * dml_pow(2, 2)); in dml_rq_dlg_get_dlg_params() 992 disp_dlg_regs->optimized_min_dst_y_next_start = disp_dlg_regs->min_dst_y_next_start; in dml_rq_dlg_get_dlg_params() 993 ASSERT(disp_dlg_regs->min_dst_y_next_start < (unsigned int)dml_pow(2, 18)); in dml_rq_dlg_get_dlg_params() 996 …ML_DLG: %s: min_dst_y_next_start = 0x%0x\n", __func__, disp_dlg_regs->min_dst_y_next_start); in dml_rq_dlg_get_dlg_params()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
D | display_rq_dlg_calc_20.c | 945 disp_dlg_regs->min_dst_y_next_start = (unsigned int) ((double) dlg_vblank_start * dml_pow(2, 2)); in dml20_rq_dlg_get_dlg_params() 946 ASSERT(disp_dlg_regs->min_dst_y_next_start < (unsigned int) dml_pow(2, 18)); in dml20_rq_dlg_get_dlg_params() 962 disp_dlg_regs->min_dst_y_next_start); in dml20_rq_dlg_get_dlg_params()
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D | display_rq_dlg_calc_20v2.c | 945 disp_dlg_regs->min_dst_y_next_start = (unsigned int) (((double) dlg_vblank_start in dml20v2_rq_dlg_get_dlg_params() 947 ASSERT(disp_dlg_regs->min_dst_y_next_start < (unsigned int) dml_pow(2, 18)); in dml20v2_rq_dlg_get_dlg_params() 963 disp_dlg_regs->min_dst_y_next_start); in dml20v2_rq_dlg_get_dlg_params()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
D | display_rq_dlg_calc_21.c | 991 disp_dlg_regs->min_dst_y_next_start = (unsigned int) (((double) dlg_vblank_start) * dml_pow(2, 2)); in dml_rq_dlg_get_dlg_params() 992 ASSERT(disp_dlg_regs->min_dst_y_next_start < (unsigned int)dml_pow(2, 18)); in dml_rq_dlg_get_dlg_params() 1013 disp_dlg_regs->min_dst_y_next_start); in dml_rq_dlg_get_dlg_params()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
D | display_rq_dlg_calc_30.c | 1058 disp_dlg_regs->min_dst_y_next_start = (unsigned int)(((double)dlg_vblank_start in dml_rq_dlg_get_dlg_params() 1060 ASSERT(disp_dlg_regs->min_dst_y_next_start < (unsigned int)dml_pow(2, 18)); in dml_rq_dlg_get_dlg_params() 1076 disp_dlg_regs->min_dst_y_next_start); in dml_rq_dlg_get_dlg_params()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn10/ |
D | dcn10_hubp.c | 599 MIN_DST_Y_NEXT_START, dlg_attr->min_dst_y_next_start); in hubp1_program_deadline() 908 MIN_DST_Y_NEXT_START, &dlg_attr->min_dst_y_next_start); in hubp1_read_state_common()
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D | dcn10_hw_sequencer_debug.c | 260 …s[i]->inst, dlg_regs->refcyc_h_blank_end, dlg_regs->dlg_vblank_end, dlg_regs->min_dst_y_next_start, in dcn10_get_dlg_states()
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D | dcn10_hw_sequencer.c | 240 …s[i]->inst, dlg_regs->refcyc_h_blank_end, dlg_regs->dlg_vblank_end, dlg_regs->min_dst_y_next_start, in dcn10_log_hubp_states()
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