/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
D | display_rq_dlg_calc_20.c | 374 unsigned int meta_req_width; in get_meta_and_pte_attr() local 495 meta_req_width = 1 << log2_meta_req_width; in get_meta_and_pte_attr() 504 meta_row_width_ub = dml_round_to_multiple(vp_width - 1, meta_req_width, 1) in get_meta_and_pte_attr() 505 + meta_req_width; in get_meta_and_pte_attr() 506 rq_dlg_param->meta_req_per_row_ub = meta_row_width_ub / meta_req_width; in get_meta_and_pte_attr() 555 meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_width; in get_meta_and_pte_attr()
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D | display_rq_dlg_calc_20v2.c | 374 unsigned int meta_req_width; in get_meta_and_pte_attr() local 495 meta_req_width = 1 << log2_meta_req_width; in get_meta_and_pte_attr() 504 meta_row_width_ub = dml_round_to_multiple(vp_width - 1, meta_req_width, 1) in get_meta_and_pte_attr() 505 + meta_req_width; in get_meta_and_pte_attr() 506 rq_dlg_param->meta_req_per_row_ub = meta_row_width_ub / meta_req_width; in get_meta_and_pte_attr() 555 meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_width; in get_meta_and_pte_attr()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
D | display_rq_dlg_calc_21.c | 364 unsigned int meta_req_width; in get_meta_and_pte_attr() local 489 meta_req_width = 1 << log2_meta_req_width; in get_meta_and_pte_attr() 498 meta_row_width_ub = dml_round_to_multiple(vp_width - 1, meta_req_width, 1) in get_meta_and_pte_attr() 499 + meta_req_width; in get_meta_and_pte_attr() 500 rq_dlg_param->meta_req_per_row_ub = meta_row_width_ub / meta_req_width; in get_meta_and_pte_attr() 552 meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_width; in get_meta_and_pte_attr()
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D | display_mode_vba_21.c | 437 unsigned int meta_req_width[], 1965 &locals->meta_req_width[k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2529 locals->meta_req_width, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 4681 &locals->meta_req_width[k], in dml21_ModeSupportAndSystemConfigurationFull() 5858 unsigned int meta_req_width[], in CalculateMetaAndPTETimes() argument 5933 meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_width[k]; in CalculateMetaAndPTETimes()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
D | display_rq_dlg_calc_30.c | 319 unsigned int meta_req_width = 0; in get_meta_and_pte_attr() local 467 meta_req_width = 1 << log2_meta_req_width; in get_meta_and_pte_attr() 476 meta_row_width_ub = dml_round_to_multiple(vp_width - 1, meta_req_width, 1) in get_meta_and_pte_attr() 477 + meta_req_width; in get_meta_and_pte_attr() 478 rq_dlg_param->meta_req_per_row_ub = meta_row_width_ub / meta_req_width; in get_meta_and_pte_attr() 527 meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_width; in get_meta_and_pte_attr()
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D | display_mode_vba_30.c | 459 int meta_req_width[], 2276 &v->meta_req_width[k], in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 2879 v->meta_req_width, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 5679 int meta_req_width[], in CalculateMetaAndPTETimes() argument 5749 meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_width[k]; in CalculateMetaAndPTETimes()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/ |
D | dml1_display_rq_dlg_calc.c | 583 unsigned int meta_req_width; in get_surf_rq_param() local 726 meta_req_width = 1 << log2_meta_req_width; in get_surf_rq_param() 736 meta_row_width_ub = dml_round_to_multiple(vp_width - 1, meta_req_width, 1) in get_surf_rq_param() 737 + meta_req_width; in get_surf_rq_param() 738 rq_dlg_param->meta_req_per_row_ub = meta_row_width_ub / meta_req_width; in get_surf_rq_param() 782 meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_width; in get_surf_rq_param()
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D | display_mode_vba.h | 821 unsigned int meta_req_width[DC__NUM_DPP__MAX]; member
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
D | display_rq_dlg_calc_31.c | 340 unsigned int meta_req_width; in get_meta_and_pte_attr() local 482 meta_req_width = 1 << log2_meta_req_width; in get_meta_and_pte_attr() 491 meta_row_width_ub = dml_round_to_multiple(vp_width - 1, meta_req_width, 1) + meta_req_width; in get_meta_and_pte_attr() 492 rq_dlg_param->meta_req_per_row_ub = meta_row_width_ub / meta_req_width; in get_meta_and_pte_attr() 526 meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_width; in get_meta_and_pte_attr()
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D | display_mode_vba_31.c | 422 int meta_req_width[], 2404 &v->meta_req_width[k], 3037 v->meta_req_width, 5894 int meta_req_width[], argument 5964 meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_width[k];
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
D | display_rq_dlg_calc_314.c | 428 unsigned int meta_req_width; in get_meta_and_pte_attr() local 570 meta_req_width = 1 << log2_meta_req_width; in get_meta_and_pte_attr() 579 meta_row_width_ub = dml_round_to_multiple(vp_width - 1, meta_req_width, 1) + meta_req_width; in get_meta_and_pte_attr() 580 rq_dlg_param->meta_req_per_row_ub = meta_row_width_ub / meta_req_width; in get_meta_and_pte_attr() 614 meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_width; in get_meta_and_pte_attr()
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D | display_mode_vba_314.c | 434 int meta_req_width[], 2426 &v->meta_req_width[k], 3059 v->meta_req_width, 5993 int meta_req_width[], argument 6063 meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_width[k];
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
D | display_mode_vba_util_32.h | 394 unsigned int meta_req_width[], 908 unsigned int meta_req_width[],
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D | display_mode_vba_util_32.c | 1931 unsigned int meta_req_width[], in dml32_CalculateVMRowAndSwath() 2122 &meta_req_width[k], in dml32_CalculateVMRowAndSwath() 4863 unsigned int meta_req_width[], in dml32_CalculateMetaAndPTETimes() argument 4933 meta_chunk_threshold = 2 * min_meta_chunk_width - meta_req_width[k]; in dml32_CalculateMetaAndPTETimes()
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D | display_mode_vba_32.c | 491 v->meta_req_width, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1297 v->meta_req_width, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
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