| /linux-6.1.9/drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_gfx.c | 41 int amdgpu_gfx_mec_queue_to_bit(struct amdgpu_device *adev, int mec, in amdgpu_gfx_mec_queue_to_bit() argument
46 bit += mec * adev->gfx.mec.num_pipe_per_mec in amdgpu_gfx_mec_queue_to_bit()
47 * adev->gfx.mec.num_queue_per_pipe; in amdgpu_gfx_mec_queue_to_bit()
48 bit += pipe * adev->gfx.mec.num_queue_per_pipe; in amdgpu_gfx_mec_queue_to_bit()
55 int *mec, int *pipe, int *queue) in amdgpu_queue_mask_bit_to_mec_queue() argument
57 *queue = bit % adev->gfx.mec.num_queue_per_pipe; in amdgpu_queue_mask_bit_to_mec_queue()
58 *pipe = (bit / adev->gfx.mec.num_queue_per_pipe) in amdgpu_queue_mask_bit_to_mec_queue()
59 % adev->gfx.mec.num_pipe_per_mec; in amdgpu_queue_mask_bit_to_mec_queue()
60 *mec = (bit / adev->gfx.mec.num_queue_per_pipe) in amdgpu_queue_mask_bit_to_mec_queue()
61 / adev->gfx.mec.num_pipe_per_mec; in amdgpu_queue_mask_bit_to_mec_queue()
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| D | amdgpu_amdkfd_gfx_v11.c | 41 static void lock_srbm(struct amdgpu_device *adev, uint32_t mec, uint32_t pipe, in lock_srbm() argument
45 soc21_grbm_select(adev, mec, pipe, queue, vmid); in lock_srbm()
57 uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in acquire_queue() local
58 uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in acquire_queue()
60 lock_srbm(adev, mec, pipe, queue_id, 0); in acquire_queue()
66 unsigned int bit = pipe_id * adev->gfx.mec.num_queue_per_pipe + in get_queue_mask()
106 uint32_t mec; in init_interrupts_v11() local
109 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in init_interrupts_v11()
110 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in init_interrupts_v11()
112 lock_srbm(adev, mec, pipe, 0, 0); in init_interrupts_v11()
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| D | amdgpu_amdkfd_gfx_v9.c | 49 static void lock_srbm(struct amdgpu_device *adev, uint32_t mec, uint32_t pipe, in lock_srbm() argument
53 soc15_grbm_select(adev, mec, pipe, queue, vmid); in lock_srbm()
65 uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in acquire_queue() local
66 uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in acquire_queue()
68 lock_srbm(adev, mec, pipe, queue_id, 0); in acquire_queue()
74 unsigned int bit = pipe_id * adev->gfx.mec.num_queue_per_pipe + in get_queue_mask()
161 uint32_t mec; in kgd_gfx_v9_init_interrupts() local
164 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_gfx_v9_init_interrupts()
165 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in kgd_gfx_v9_init_interrupts()
167 lock_srbm(adev, mec, pipe, 0, 0); in kgd_gfx_v9_init_interrupts()
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| D | amdgpu_amdkfd_gfx_v10_3.c | 43 static void lock_srbm(struct amdgpu_device *adev, uint32_t mec, uint32_t pipe, in lock_srbm() argument
47 nv_grbm_select(adev, mec, pipe, queue, vmid); in lock_srbm()
59 uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in acquire_queue() local
60 uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in acquire_queue()
62 lock_srbm(adev, mec, pipe, queue_id, 0); in acquire_queue()
68 unsigned int bit = pipe_id * adev->gfx.mec.num_queue_per_pipe + in get_queue_mask()
110 uint32_t mec; in init_interrupts_v10_3() local
113 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in init_interrupts_v10_3()
114 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in init_interrupts_v10_3()
116 lock_srbm(adev, mec, pipe, 0, 0); in init_interrupts_v10_3()
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| D | amdgpu_amdkfd_gfx_v8.c | 42 static void lock_srbm(struct amdgpu_device *adev, uint32_t mec, uint32_t pipe, in lock_srbm() argument
45 uint32_t value = PIPEID(pipe) | MEID(mec) | VMID(vmid) | QUEUEID(queue); in lock_srbm()
60 uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in acquire_queue() local
61 uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in acquire_queue()
63 lock_srbm(adev, mec, pipe, queue_id, 0); in acquire_queue()
114 uint32_t mec; in kgd_init_interrupts() local
117 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_init_interrupts()
118 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in kgd_init_interrupts()
120 lock_srbm(adev, mec, pipe, 0, 0); in kgd_init_interrupts()
169 uint32_t value, mec, pipe; in kgd_hqd_load() local
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| D | amdgpu_amdkfd_gfx_v10.c | 42 static void lock_srbm(struct amdgpu_device *adev, uint32_t mec, uint32_t pipe, in lock_srbm() argument
46 nv_grbm_select(adev, mec, pipe, queue, vmid); in lock_srbm()
58 uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in acquire_queue() local
59 uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in acquire_queue()
61 lock_srbm(adev, mec, pipe, queue_id, 0); in acquire_queue()
67 unsigned int bit = pipe_id * adev->gfx.mec.num_queue_per_pipe + in get_queue_mask()
140 uint32_t mec; in kgd_init_interrupts() local
143 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_init_interrupts()
144 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in kgd_init_interrupts()
146 lock_srbm(adev, mec, pipe, 0, 0); in kgd_init_interrupts()
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| D | amdgpu_amdkfd_gfx_v7.c | 48 static void lock_srbm(struct amdgpu_device *adev, uint32_t mec, uint32_t pipe, in lock_srbm() argument
51 uint32_t value = PIPEID(pipe) | MEID(mec) | VMID(vmid) | QUEUEID(queue); in lock_srbm()
66 uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in acquire_queue() local
67 uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in acquire_queue()
69 lock_srbm(adev, mec, pipe, queue_id, 0); in acquire_queue()
119 uint32_t mec; in kgd_init_interrupts() local
122 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_init_interrupts()
123 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in kgd_init_interrupts()
125 lock_srbm(adev, mec, pipe, 0, 0); in kgd_init_interrupts()
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| D | gfx_v11_0.c | 712 amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL); in gfx_v11_0_mec_fini()
713 amdgpu_bo_free_kernel(&adev->gfx.mec.mec_fw_obj, NULL, NULL); in gfx_v11_0_mec_fini()
714 amdgpu_bo_free_kernel(&adev->gfx.mec.mec_fw_data_obj, NULL, NULL); in gfx_v11_0_mec_fini()
738 bitmap_zero(adev->gfx.mec.queue_bitmap, AMDGPU_MAX_COMPUTE_QUEUES); in gfx_v11_0_mec_init()
747 &adev->gfx.mec.hpd_eop_obj, in gfx_v11_0_mec_init()
748 &adev->gfx.mec.hpd_eop_gpu_addr, in gfx_v11_0_mec_init()
758 amdgpu_bo_kunmap(adev->gfx.mec.hpd_eop_obj); in gfx_v11_0_mec_init()
759 amdgpu_bo_unreserve(adev->gfx.mec.hpd_eop_obj); in gfx_v11_0_mec_init()
910 int mec, int pipe, int queue) in gfx_v11_0_compute_ring_init() argument
920 ring->me = mec + 1; in gfx_v11_0_compute_ring_init()
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| D | amdgpu_gfx.h | 279 struct amdgpu_mec mec; member
397 int amdgpu_gfx_mec_queue_to_bit(struct amdgpu_device *adev, int mec,
400 int *mec, int *pipe, int *queue);
401 bool amdgpu_gfx_is_mec_queue_enabled(struct amdgpu_device *adev, int mec,
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| D | amdgpu_amdkfd.c | 151 .num_pipe_per_mec = adev->gfx.mec.num_pipe_per_mec, in amdgpu_amdkfd_device_init()
152 .num_queue_per_pipe = adev->gfx.mec.num_queue_per_pipe, in amdgpu_amdkfd_device_init()
165 adev->gfx.mec.queue_bitmap, in amdgpu_amdkfd_device_init()
172 * adev->gfx.mec.num_pipe_per_mec in amdgpu_amdkfd_device_init()
173 * adev->gfx.mec.num_queue_per_pipe; in amdgpu_amdkfd_device_init()
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| D | gfx_v7_0.c | 2756 amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL); in gfx_v7_0_mec_fini()
2765 bitmap_zero(adev->gfx.mec.queue_bitmap, AMDGPU_MAX_COMPUTE_QUEUES); in gfx_v7_0_mec_init()
2771 mec_hpd_size = adev->gfx.mec.num_mec * adev->gfx.mec.num_pipe_per_mec in gfx_v7_0_mec_init()
2776 &adev->gfx.mec.hpd_eop_obj, in gfx_v7_0_mec_init()
2777 &adev->gfx.mec.hpd_eop_gpu_addr, in gfx_v7_0_mec_init()
2788 amdgpu_bo_kunmap(adev->gfx.mec.hpd_eop_obj); in gfx_v7_0_mec_init()
2789 amdgpu_bo_unreserve(adev->gfx.mec.hpd_eop_obj); in gfx_v7_0_mec_init()
2834 int mec, int pipe) in gfx_v7_0_compute_pipe_init() argument
2838 size_t eop_offset = (mec * adev->gfx.mec.num_pipe_per_mec + pipe) in gfx_v7_0_compute_pipe_init()
2842 eop_gpu_addr = adev->gfx.mec.hpd_eop_gpu_addr + eop_offset; in gfx_v7_0_compute_pipe_init()
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| D | gfx_v9_0.c | 1761 amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL); in gfx_v9_0_mec_fini()
1762 amdgpu_bo_free_kernel(&adev->gfx.mec.mec_fw_obj, NULL, NULL); in gfx_v9_0_mec_fini()
1776 bitmap_zero(adev->gfx.mec.queue_bitmap, AMDGPU_MAX_COMPUTE_QUEUES); in gfx_v9_0_mec_init()
1784 &adev->gfx.mec.hpd_eop_obj, in gfx_v9_0_mec_init()
1785 &adev->gfx.mec.hpd_eop_gpu_addr, in gfx_v9_0_mec_init()
1795 amdgpu_bo_kunmap(adev->gfx.mec.hpd_eop_obj); in gfx_v9_0_mec_init()
1796 amdgpu_bo_unreserve(adev->gfx.mec.hpd_eop_obj); in gfx_v9_0_mec_init()
1808 &adev->gfx.mec.mec_fw_obj, in gfx_v9_0_mec_init()
1809 &adev->gfx.mec.mec_fw_gpu_addr, in gfx_v9_0_mec_init()
1819 amdgpu_bo_kunmap(adev->gfx.mec.mec_fw_obj); in gfx_v9_0_mec_init()
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| D | gfx_v8_0.c | 1326 amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL); in gfx_v8_0_mec_fini()
1335 bitmap_zero(adev->gfx.mec.queue_bitmap, AMDGPU_MAX_COMPUTE_QUEUES); in gfx_v8_0_mec_init()
1344 &adev->gfx.mec.hpd_eop_obj, in gfx_v8_0_mec_init()
1345 &adev->gfx.mec.hpd_eop_gpu_addr, in gfx_v8_0_mec_init()
1354 amdgpu_bo_kunmap(adev->gfx.mec.hpd_eop_obj); in gfx_v8_0_mec_init()
1355 amdgpu_bo_unreserve(adev->gfx.mec.hpd_eop_obj); in gfx_v8_0_mec_init()
1888 int mec, int pipe, int queue) in gfx_v8_0_compute_ring_init() argument
1898 ring->me = mec + 1; in gfx_v8_0_compute_ring_init()
1905 ring->eop_gpu_addr = adev->gfx.mec.hpd_eop_gpu_addr in gfx_v8_0_compute_ring_init()
1910 + ((ring->me - 1) * adev->gfx.mec.num_pipe_per_mec) in gfx_v8_0_compute_ring_init()
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| D | gfx_v10_0.c | 4269 amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL); in gfx_v10_0_mec_fini()
4270 amdgpu_bo_free_kernel(&adev->gfx.mec.mec_fw_obj, NULL, NULL); in gfx_v10_0_mec_fini()
4299 bitmap_zero(adev->gfx.mec.queue_bitmap, AMDGPU_MAX_COMPUTE_QUEUES); in gfx_v10_0_mec_init()
4308 &adev->gfx.mec.hpd_eop_obj, in gfx_v10_0_mec_init()
4309 &adev->gfx.mec.hpd_eop_gpu_addr, in gfx_v10_0_mec_init()
4319 amdgpu_bo_kunmap(adev->gfx.mec.hpd_eop_obj); in gfx_v10_0_mec_init()
4320 amdgpu_bo_unreserve(adev->gfx.mec.hpd_eop_obj); in gfx_v10_0_mec_init()
4332 &adev->gfx.mec.mec_fw_obj, in gfx_v10_0_mec_init()
4333 &adev->gfx.mec.mec_fw_gpu_addr, in gfx_v10_0_mec_init()
4343 amdgpu_bo_kunmap(adev->gfx.mec.mec_fw_obj); in gfx_v10_0_mec_init()
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| /linux-6.1.9/Documentation/translations/zh_CN/process/ |
| D | magic-number.rst | 36 <mailto:mec@shout.net>
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| /linux-6.1.9/Documentation/translations/zh_TW/process/ |
| D | magic-number.rst | 39 <mailto:mec@shout.net>
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| /linux-6.1.9/drivers/gpu/drm/radeon/ |
| D | cik.c | 4362 if (rdev->mec.hpd_eop_obj) { in cik_mec_fini()
4363 r = radeon_bo_reserve(rdev->mec.hpd_eop_obj, false); in cik_mec_fini()
4366 radeon_bo_unpin(rdev->mec.hpd_eop_obj); in cik_mec_fini()
4367 radeon_bo_unreserve(rdev->mec.hpd_eop_obj); in cik_mec_fini()
4369 radeon_bo_unref(&rdev->mec.hpd_eop_obj); in cik_mec_fini()
4370 rdev->mec.hpd_eop_obj = NULL; in cik_mec_fini()
4386 rdev->mec.num_mec = 2; in cik_mec_init()
4388 rdev->mec.num_mec = 1; in cik_mec_init()
4389 rdev->mec.num_pipe = 4; in cik_mec_init()
4390 rdev->mec.num_queue = rdev->mec.num_mec * rdev->mec.num_pipe * 8; in cik_mec_init()
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| D | radeon.h | 2445 struct radeon_mec mec; member
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| /linux-6.1.9/Documentation/process/ |
| D | magic-number.rst | 41 <mailto:mec@shout.net>
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| /linux-6.1.9/Documentation/translations/it_IT/process/ |
| D | magic-number.rst | 46 <mailto:mec@shout.net>
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| /linux-6.1.9/drivers/gpu/drm/amd/amdkfd/ |
| D | kfd_device_queue_manager.c | 74 static bool is_pipe_enabled(struct device_queue_manager *dqm, int mec, int pipe) in is_pipe_enabled() argument
77 int pipe_offset = (mec * dqm->dev->shared_resources.num_pipe_per_mec in is_pipe_enabled()
1426 int i, mec; in set_sched_resources() local
1433 mec = (i / dqm->dev->shared_resources.num_queue_per_pipe) in set_sched_resources()
1440 if (mec > 0) in set_sched_resources()
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| D | kfd_priv.h | 557 uint32_t mec; member
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| /linux-6.1.9/Documentation/userspace-api/ioctl/ |
| D | ioctl-number.rst | 8 <mec@shout.net>
33 patch to Linus Torvalds. Or you can e-mail me at <mec@shout.net> and
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| /linux-6.1.9/Documentation/kbuild/ |
| D | makefiles.rst | 1683 - Original version made by Michael Elizabeth Chastain, <mailto:mec@shout.net>
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| /linux-6.1.9/ |
| D | CREDITS | 665 E: mec@shout.net
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