Searched refs:mc_arb_ramcfg (Results 1 – 13 of 13) sorted by relevance
1195 u32 mc_arb_ramcfg; in rv770_gpu_init() local1311 mc_arb_ramcfg = RREG32(MC_ARB_RAMCFG); in rv770_gpu_init()1367 if ((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT) in rv770_gpu_init()1373 gb_tiling_config |= GROUP_SIZE((mc_arb_ramcfg & BURSTLENGTH_MASK) >> BURSTLENGTH_SHIFT); in rv770_gpu_init()1374 if (((mc_arb_ramcfg & NOOFROWS_MASK) >> NOOFROWS_SHIFT) > 3) { in rv770_gpu_init()1379 ROW_TILING(((mc_arb_ramcfg & NOOFROWS_MASK) >> NOOFROWS_SHIFT)); in rv770_gpu_init()1381 SAMPLE_SPLIT(((mc_arb_ramcfg & NOOFROWS_MASK) >> NOOFROWS_SHIFT)); in rv770_gpu_init()
881 u32 mc_arb_ramcfg; in cayman_gpu_init() local1007 mc_arb_ramcfg = RREG32(MC_ARB_RAMCFG); in cayman_gpu_init()1009 tmp = (mc_arb_ramcfg & NOOFCOLS_MASK) >> NOOFCOLS_SHIFT; in cayman_gpu_init()1060 switch ((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT) { in cayman_gpu_init()
3138 u32 mc_arb_ramcfg; in evergreen_gpu_init() local3406 mc_arb_ramcfg = RREG32(FUS_MC_ARB_RAMCFG); in evergreen_gpu_init()3408 mc_arb_ramcfg = RREG32(MC_ARB_RAMCFG); in evergreen_gpu_init()3437 switch ((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT) { in evergreen_gpu_init()
3091 u32 mc_arb_ramcfg; in si_gpu_init() local3204 mc_arb_ramcfg = RREG32(MC_ARB_RAMCFG); in si_gpu_init()3208 tmp = (mc_arb_ramcfg & NOOFCOLS_MASK) >> NOOFCOLS_SHIFT; in si_gpu_init()3256 switch ((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT) { in si_gpu_init()
3171 u32 mc_arb_ramcfg; in cik_gpu_init() local3265 mc_arb_ramcfg = RREG32(MC_ARB_RAMCFG); in cik_gpu_init()3269 tmp = (mc_arb_ramcfg & NOOFCOLS_MASK) >> NOOFCOLS_SHIFT; in cik_gpu_init()3318 ((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT) << 4; in cik_gpu_init()
158 unsigned mc_arb_ramcfg; member
4245 u32 mc_arb_ramcfg; in gfx_v7_0_gpu_early_init() local4322 adev->gfx.config.mc_arb_ramcfg = RREG32(mmMC_ARB_RAMCFG); in gfx_v7_0_gpu_early_init()4323 mc_arb_ramcfg = adev->gfx.config.mc_arb_ramcfg; in gfx_v7_0_gpu_early_init()4325 adev->gfx.config.num_banks = REG_GET_FIELD(mc_arb_ramcfg, in gfx_v7_0_gpu_early_init()4327 adev->gfx.config.num_ranks = REG_GET_FIELD(mc_arb_ramcfg, in gfx_v7_0_gpu_early_init()4359 tmp = (mc_arb_ramcfg & MC_ARB_RAMCFG__NOOFCOLS_MASK) >> MC_ARB_RAMCFG__NOOFCOLS__SHIFT; in gfx_v7_0_gpu_early_init()
1579 u32 mc_arb_ramcfg; in gfx_v6_0_constants_init() local1681 adev->gfx.config.mc_arb_ramcfg = RREG32(mmMC_ARB_RAMCFG); in gfx_v6_0_constants_init()1682 mc_arb_ramcfg = adev->gfx.config.mc_arb_ramcfg; in gfx_v6_0_constants_init()1686 tmp = (mc_arb_ramcfg & MC_ARB_RAMCFG__NOOFCOLS_MASK) >> MC_ARB_RAMCFG__NOOFCOLS__SHIFT; in gfx_v6_0_constants_init()
1682 u32 mc_arb_ramcfg; in gfx_v8_0_gpu_early_init() local1822 adev->gfx.config.mc_arb_ramcfg = RREG32(mmMC_ARB_RAMCFG); in gfx_v8_0_gpu_early_init()1823 mc_arb_ramcfg = adev->gfx.config.mc_arb_ramcfg; in gfx_v8_0_gpu_early_init()1825 adev->gfx.config.num_banks = REG_GET_FIELD(mc_arb_ramcfg, in gfx_v8_0_gpu_early_init()1827 adev->gfx.config.num_ranks = REG_GET_FIELD(mc_arb_ramcfg, in gfx_v8_0_gpu_early_init()1859 tmp = REG_GET_FIELD(mc_arb_ramcfg, MC_ARB_RAMCFG, NOOFCOLS); in gfx_v8_0_gpu_early_init()
1159 return adev->gfx.config.mc_arb_ramcfg; in cik_get_register_value()
784 return adev->gfx.config.mc_arb_ramcfg; in vi_get_register_value()
737 config[no_regs++] = adev->gfx.config.mc_arb_ramcfg; in amdgpu_debugfs_gca_config_read()
1199 return adev->gfx.config.mc_arb_ramcfg; in si_get_register_value()