Searched refs:mask_offset (Results 1 – 9 of 9) sorted by relevance
| /linux-6.1.9/arch/arm/mach-omap1/ |
| D | mux.h | 29 .mask_offset = mode_offset, \
43 .mask_offset = mode_offset, \
54 .mask_offset = mode_offset, \
66 .mask_offset = mode_offset, \
109 const unsigned char mask_offset; member
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| D | mux.c | 348 mask = (0x7 << cfg->mask_offset); in omap1_cfg_reg()
352 tmp2 = (cfg->mask << cfg->mask_offset); in omap1_cfg_reg()
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| /linux-6.1.9/arch/arm/plat-orion/ |
| D | gpio.c | 46 int mask_offset; member
83 return ochip->base + ochip->mask_offset + GPIO_EDGE_MASK_OFF; in GPIO_EDGE_MASK()
88 return ochip->base + ochip->mask_offset + GPIO_LEVEL_MASK_OFF; in GPIO_LEVEL_MASK()
520 void __iomem *base, int mask_offset, in orion_gpio_init() argument
553 ochip->mask_offset = mask_offset; in orion_gpio_init()
582 ct->regs.mask = ochip->mask_offset + GPIO_LEVEL_MASK_OFF; in orion_gpio_init()
590 ct->regs.mask = ochip->mask_offset + GPIO_EDGE_MASK_OFF; in orion_gpio_init()
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| /linux-6.1.9/arch/arm/mach-davinci/ |
| D | mux.c | 70 mask = (cfg->mask << cfg->mask_offset); in davinci_cfg_reg()
74 tmp2 = (cfg->mode << cfg->mask_offset); in davinci_cfg_reg()
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| D | mux.h | 18 const unsigned char mask_offset; member
989 .mask_offset = mode_offset, \
1000 .mask_offset = mode_offset, \
1011 .mask_offset = mode_offset, \
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| /linux-6.1.9/drivers/irqchip/ |
| D | irq-brcmstb-l2.c | 60 int mask_offset; member
101 ~(irq_reg_readl(b->gc, b->mask_offset)); in brcmstb_l2_intc_irq_handle()
227 data->mask_offset = init_params->cpu_mask_status; in brcmstb_l2_intc_of_init()
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| /linux-6.1.9/arch/arm/plat-orion/include/plat/ |
| D | orion-gpio.h | 34 void __iomem *base, int mask_offset,
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| /linux-6.1.9/drivers/pinctrl/mediatek/ |
| D | mtk-eint.c | 341 int offset, mask_offset, index; in mtk_eint_irq_handler() local
351 mask_offset = eint_num >> 5; in mtk_eint_irq_handler()
361 if (eint->wake_mask[mask_offset] & BIT(offset) && in mtk_eint_irq_handler()
362 !(eint->cur_mask[mask_offset] & BIT(offset))) { in mtk_eint_irq_handler()
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| /linux-6.1.9/drivers/pci/controller/ |
| D | pcie-microchip-host.c | 210 .mask_offset = PCIE_EVENT_INT, \
218 .mask_offset = SEC_ERROR_INT_MASK, \
226 .mask_offset = DED_ERROR_INT_MASK, \
234 .mask_offset = IMASK_LOCAL, \
351 u32 mask_offset; member
779 event_descs[event].mask_offset; in mc_mask_event_irq()
809 event_descs[event].mask_offset; in mc_unmask_event_irq()
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