Searched refs:madc (Results 1 – 10 of 10) sorted by relevance
| /linux-6.1.9/drivers/iio/adc/ |
| D | twl4030-madc.c | 178 struct twl4030_madc_data *madc = iio_priv(iio_dev); in twl4030_madc_read() local
182 req.method = madc->use_second_irq ? TWL4030_MADC_SW2 : TWL4030_MADC_SW1; in twl4030_madc_read()
301 static int twl4030_madc_channel_raw_read(struct twl4030_madc_data *madc, u8 reg) in twl4030_madc_channel_raw_read() argument
311 dev_err(madc->dev, "unable to read register 0x%X\n", reg); in twl4030_madc_channel_raw_read()
372 static int twl4030_madc_read_channels(struct twl4030_madc_data *madc, in twl4030_madc_read_channels() argument
383 buf[i] = twl4030_madc_channel_raw_read(madc, reg); in twl4030_madc_read_channels()
385 dev_err(madc->dev, "Unable to read register 0x%X\n", in twl4030_madc_read_channels()
397 dev_err(madc->dev, "err reading current\n"); in twl4030_madc_read_channels()
407 dev_err(madc->dev, "err reading temperature\n"); in twl4030_madc_read_channels()
441 static int twl4030_madc_disable_irq(struct twl4030_madc_data *madc, u8 id) in twl4030_madc_disable_irq() argument
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| D | Makefile | 115 obj-$(CONFIG_TWL4030_MADC) += twl4030-madc.o
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| D | Kconfig | 1269 called twl4030-madc.
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| /linux-6.1.9/Documentation/devicetree/bindings/iio/adc/ |
| D | ti,twl4030-madc.yaml | 4 $id: http://devicetree.org/schemas/iio/adc/ti,twl4030-madc.yaml#
18 const: ti,twl4030-madc
23 ti,system-uses-second-madc-irq:
26 Set if the second madc irq register should be used, which is intended
42 madc {
43 compatible = "ti,twl4030-madc";
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| /linux-6.1.9/Documentation/hwmon/ |
| D | twl4030-madc-hwmon.rst | 1 Kernel driver twl4030-madc
8 Prefix: 'twl4030-madc'
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| D | index.rst | 210 twl4030-madc-hwmon
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| /linux-6.1.9/arch/arm/boot/dts/ |
| D | twl4030.dtsi | 155 twl_madc: madc {
156 compatible = "ti,twl4030-madc";
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| /linux-6.1.9/sound/soc/codecs/ |
| D | tlv320aic32x4.c | 715 u8 madc, nadc, mdac, ndac, max_nadc, min_mdac, max_ndac; in aic32x4_setup_clocks() local
769 madc = DIV_ROUND_UP((32 * adc_resource_class), aosr); in aic32x4_setup_clocks()
774 max_nadc = AIC32X4_MAX_CODEC_CLKIN_FREQ / (madc * aosr * sample_rate); in aic32x4_setup_clocks()
777 adc_clock_rate = nadc * madc * aosr * sample_rate; in aic32x4_setup_clocks()
796 madc); in aic32x4_setup_clocks()
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| D | tlv320aic31xx.c | 193 u8 madc; member
935 aic31xx_divs[i].madc ? aic31xx_divs[i].madc : 1); in aic31xx_setup_pll()
955 aic31xx_divs[i].madc, in aic31xx_setup_pll()
1250 if (aic31xx_divs[aic31xx->rate_div_line].madc) in aic31xx_clk_on()
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| D | tlv320adc3xxx.c | 476 u8 madc; member
1203 ADC3XXX_MADC_MASK, adc3xxx_divs[i].madc); in adc3xxx_hw_params()
1209 bdiv = (adc3xxx_divs[i].aosr * adc3xxx_divs[i].madc) / (2 * width); in adc3xxx_hw_params()
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