Searched refs:m_n (Results 1 – 9 of 9) sorted by relevance
| /linux-6.1.9/drivers/gpu/drm/i915/display/ |
| D | intel_crtc_state_dump.c | 28 const struct intel_link_m_n *m_n) in intel_dump_m_n_config() argument
35 m_n->data_m, m_n->data_n, in intel_dump_m_n_config()
36 m_n->link_m, m_n->link_n, m_n->tu); in intel_dump_m_n_config()
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| D | intel_pch_display.h | 39 struct intel_link_m_n *m_n);
41 struct intel_link_m_n *m_n);
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| D | intel_display.h | 549 struct intel_link_m_n *m_n,
622 void intel_zero_m_n(struct intel_link_m_n *m_n);
624 const struct intel_link_m_n *m_n,
628 struct intel_link_m_n *m_n,
635 const struct intel_link_m_n *m_n);
638 const struct intel_link_m_n *m_n);
641 struct intel_link_m_n *m_n);
644 struct intel_link_m_n *m_n);
647 int intel_dotclock_calculate(int link_freq, const struct intel_link_m_n *m_n);
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| D | intel_pch_display.c | 170 const struct intel_link_m_n *m_n) in intel_pch_transcoder_set_m1_n1() argument
175 intel_set_m_n(dev_priv, m_n, in intel_pch_transcoder_set_m1_n1()
181 const struct intel_link_m_n *m_n) in intel_pch_transcoder_set_m2_n2() argument
186 intel_set_m_n(dev_priv, m_n, in intel_pch_transcoder_set_m2_n2()
192 struct intel_link_m_n *m_n) in intel_pch_transcoder_get_m1_n1() argument
197 intel_get_m_n(dev_priv, m_n, in intel_pch_transcoder_get_m1_n1()
203 struct intel_link_m_n *m_n) in intel_pch_transcoder_get_m2_n2() argument
208 intel_get_m_n(dev_priv, m_n, in intel_pch_transcoder_get_m2_n2()
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| D | intel_drrs.c | 93 &crtc->drrs.m2_n2 : &crtc->drrs.m_n); in intel_drrs_set_refresh_rate_m_n()
159 crtc->drrs.m_n = crtc_state->dp_m_n; in intel_drrs_activate()
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| D | intel_display.c | 2745 struct intel_link_m_n *m_n, in intel_link_compute_m_n() argument
2760 m_n->tu = 64; in intel_link_compute_m_n()
2761 compute_m_n(&m_n->data_m, &m_n->data_n, in intel_link_compute_m_n()
2765 compute_m_n(&m_n->link_m, &m_n->link_n, in intel_link_compute_m_n()
2793 void intel_zero_m_n(struct intel_link_m_n *m_n) in intel_zero_m_n() argument
2796 memset(m_n, 0, sizeof(*m_n)); in intel_zero_m_n()
2797 m_n->tu = 1; in intel_zero_m_n()
2801 const struct intel_link_m_n *m_n, in intel_set_m_n() argument
2805 intel_de_write(i915, data_m_reg, TU_SIZE(m_n->tu) | m_n->data_m); in intel_set_m_n()
2806 intel_de_write(i915, data_n_reg, m_n->data_n); in intel_set_m_n()
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| D | intel_display_types.h | 1390 struct intel_link_m_n m_n, m2_n2; member
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| /linux-6.1.9/drivers/gpu/drm/gma500/ |
| D | cdv_intel_dp.c | 970 struct cdv_intel_dp_m_n *m_n) in cdv_intel_dp_compute_m_n() argument
972 m_n->tu = 64; in cdv_intel_dp_compute_m_n()
973 m_n->gmch_m = (pixel_clock * bpp + 7) >> 3; in cdv_intel_dp_compute_m_n()
974 m_n->gmch_n = link_clock * nlanes; in cdv_intel_dp_compute_m_n()
975 cdv_intel_reduce_ratio(&m_n->gmch_m, &m_n->gmch_n); in cdv_intel_dp_compute_m_n()
976 m_n->link_m = pixel_clock; in cdv_intel_dp_compute_m_n()
977 m_n->link_n = link_clock; in cdv_intel_dp_compute_m_n()
978 cdv_intel_reduce_ratio(&m_n->link_m, &m_n->link_n); in cdv_intel_dp_compute_m_n()
991 struct cdv_intel_dp_m_n m_n; in cdv_intel_dp_set_m_n() local
1022 mode->clock, adjusted_mode->clock, &m_n); in cdv_intel_dp_set_m_n()
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| /linux-6.1.9/drivers/gpu/drm/hisilicon/kirin/ |
| D | dw_drm_dsi.c | 131 u32 m_n = 0; in dsi_calc_phy_rate() local
161 m_n = (temp % (u64)1000000000) / (u64)100000000; in dsi_calc_phy_rate()
164 if (m_n * 6 >= 50) { in dsi_calc_phy_rate()
167 } else if (m_n * 6 >= 30) { in dsi_calc_phy_rate()
175 if (m_n * 6 >= 50) { in dsi_calc_phy_rate()
178 } else if (m_n * 6 >= 30) { in dsi_calc_phy_rate()
181 } else if (m_n * 6 >= 10) { in dsi_calc_phy_rate()
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