/linux-6.1.9/drivers/media/platform/qcom/camss/ |
D | camss-csiphy-2ph-1-0.c | 32 u8 lane_mask; in csiphy_get_lane_mask() local 35 lane_mask = 1 << CAMSS_CSI_PHY_LN_CLK; in csiphy_get_lane_mask() 38 lane_mask |= 1 << lane_cfg->data[i].pos; in csiphy_get_lane_mask() 40 return lane_mask; in csiphy_get_lane_mask() 99 s64 link_freq, u8 lane_mask) in csiphy_lanes_enable() argument 114 val |= lane_mask << 1; in csiphy_lanes_enable()
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D | camss-csiphy-3ph-1-0.c | 454 u8 lane_mask; in csiphy_get_lane_mask() local 457 lane_mask = CSIPHY_3PH_CMN_CSI_COMMON_CTRL5_CLK_ENABLE; in csiphy_get_lane_mask() 460 lane_mask |= 1 << lane_cfg->data[i].pos; in csiphy_get_lane_mask() 462 return lane_mask; in csiphy_get_lane_mask() 467 s64 link_freq, u8 lane_mask) in csiphy_lanes_enable() argument
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D | camss-csiphy.h | 60 s64 link_freq, u8 lane_mask);
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D | camss-csiphy.c | 246 u8 lane_mask = csiphy->ops->get_lane_mask(&cfg->csi2->lane_cfg); in csiphy_stream_on() local 262 if (cfg->combo_mode && (lane_mask & 0x18) == 0x18) { in csiphy_stream_on() 275 csiphy->ops->lanes_enable(csiphy, cfg, link_freq, lane_mask); in csiphy_stream_on()
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/linux-6.1.9/drivers/gpu/drm/i915/display/ |
D | intel_combo_phy.c | 276 u8 lane_mask; in intel_combo_phy_power_up_lanes() local 284 lane_mask = PWR_DOWN_LN_3_1_0; in intel_combo_phy_power_up_lanes() 287 lane_mask = PWR_DOWN_LN_3_1; in intel_combo_phy_power_up_lanes() 290 lane_mask = PWR_DOWN_LN_3; in intel_combo_phy_power_up_lanes() 296 lane_mask = PWR_UP_ALL_LANES; in intel_combo_phy_power_up_lanes() 302 lane_mask = lane_reversal ? PWR_DOWN_LN_2_1_0 : in intel_combo_phy_power_up_lanes() 306 lane_mask = lane_reversal ? PWR_DOWN_LN_1_0 : in intel_combo_phy_power_up_lanes() 313 lane_mask = PWR_UP_ALL_LANES; in intel_combo_phy_power_up_lanes() 320 val |= lane_mask; in intel_combo_phy_power_up_lanes()
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D | intel_tc.c | 123 u32 lane_mask; in intel_tc_port_get_lane_mask() local 125 lane_mask = intel_uncore_read(uncore, in intel_tc_port_get_lane_mask() 128 drm_WARN_ON(&i915->drm, lane_mask == 0xffffffff); in intel_tc_port_get_lane_mask() 131 lane_mask &= DP_LANE_ASSIGNMENT_MASK(dig_port->tc_phy_fia_idx); in intel_tc_port_get_lane_mask() 132 return lane_mask >> DP_LANE_ASSIGNMENT_SHIFT(dig_port->tc_phy_fia_idx); in intel_tc_port_get_lane_mask() 155 u32 lane_mask; in intel_tc_port_fia_max_lane_count() local 162 lane_mask = 0; in intel_tc_port_fia_max_lane_count() 164 lane_mask = intel_tc_port_get_lane_mask(dig_port); in intel_tc_port_fia_max_lane_count() 166 switch (lane_mask) { in intel_tc_port_fia_max_lane_count() 168 MISSING_CASE(lane_mask); in intel_tc_port_fia_max_lane_count()
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D | g4x_dp.c | 660 unsigned int lane_mask = 0x0; in intel_enable_dp() local 663 lane_mask = intel_dp_unused_lane_mask(pipe_config->lane_count); in intel_enable_dp() 666 lane_mask); in intel_enable_dp()
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D | intel_dpio_phy.c | 808 unsigned int lane_mask = in chv_phy_pre_pll_enable() local 820 chv_phy_powergate_lanes(encoder, true, lane_mask); in chv_phy_pre_pll_enable()
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/linux-6.1.9/drivers/video/fbdev/omap2/omapfb/dss/ |
D | core.c | 60 int dss_dsi_enable_pads(int dsi_id, unsigned lane_mask) in dss_dsi_enable_pads() argument 67 return board_data->dsi_enable_pads(dsi_id, lane_mask); in dss_dsi_enable_pads() 70 void dss_dsi_disable_pads(int dsi_id, unsigned lane_mask) in dss_dsi_disable_pads() argument 77 return board_data->dsi_disable_pads(dsi_id, lane_mask); in dss_dsi_disable_pads()
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D | dss.h | 192 int dss_dsi_enable_pads(int dsi_id, unsigned lane_mask); 193 void dss_dsi_disable_pads(int dsi_id, unsigned lane_mask);
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/linux-6.1.9/include/linux/platform_data/ |
D | omapdss.h | 26 int (*dsi_enable_pads)(int dsi_id, unsigned int lane_mask); 27 void (*dsi_disable_pads)(int dsi_id, unsigned int lane_mask);
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/linux-6.1.9/arch/arm/mach-omap2/ |
D | display.c | 111 static int omap_dsi_enable_pads(int dsi_id, unsigned lane_mask) in omap_dsi_enable_pads() argument 114 return omap4_dsi_mux_pads(dsi_id, lane_mask); in omap_dsi_enable_pads() 119 static void omap_dsi_disable_pads(int dsi_id, unsigned lane_mask) in omap_dsi_disable_pads() argument
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/linux-6.1.9/drivers/phy/qualcomm/ |
D | phy-qcom-qmp-pcie-msm8996.c | 58 u8 lane_mask; member 65 .lane_mask = 0xff, \ 73 .lane_mask = 0xff, \ 80 .lane_mask = l, \ 353 u8 lane_mask) in qmp_pcie_msm8996_configure_lane() argument 362 if (!(t->lane_mask & lane_mask)) in qmp_pcie_msm8996_configure_lane()
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D | phy-qcom-qmp-ufs.c | 53 u8 lane_mask; member 60 .lane_mask = 0xff, \ 68 .lane_mask = 0xff, \ 75 .lane_mask = l, \ 802 u8 lane_mask) in qmp_ufs_configure_lane() argument 811 if (!(t->lane_mask & lane_mask)) in qmp_ufs_configure_lane()
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D | phy-qcom-qmp-pcie.c | 54 u8 lane_mask; member 61 .lane_mask = 0xff, \ 69 .lane_mask = 0xff, \ 76 .lane_mask = l, \ 1871 u8 lane_mask) in qmp_pcie_configure_lane() argument 1880 if (!(t->lane_mask & lane_mask)) in qmp_pcie_configure_lane()
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D | phy-qcom-qmp-combo.c | 81 u8 lane_mask; member 88 .lane_mask = 0xff, \ 96 .lane_mask = 0xff, \ 103 .lane_mask = l, \ 1392 u8 lane_mask) in qmp_combo_configure_lane() argument 1401 if (!(t->lane_mask & lane_mask)) in qmp_combo_configure_lane()
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D | phy-qcom-qmp-usb.c | 79 u8 lane_mask; member 86 .lane_mask = 0xff, \ 94 .lane_mask = 0xff, \ 101 .lane_mask = l, \ 1970 u8 lane_mask) in qmp_usb_configure_lane() argument 1979 if (!(t->lane_mask & lane_mask)) in qmp_usb_configure_lane()
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/linux-6.1.9/drivers/media/platform/ti/cal/ |
D | cal-camerarx.c | 77 u32 lane_mask = CAL_CSI2_COMPLEXIO_CFG_CLOCK_POSITION_MASK; in cal_camerarx_lane_config() local 83 cal_set_field(&val, mipi_csi2->clock_lane + 1, lane_mask); in cal_camerarx_lane_config() 90 lane_mask <<= 4; in cal_camerarx_lane_config() 92 cal_set_field(&val, mipi_csi2->data_lanes[lane] + 1, lane_mask); in cal_camerarx_lane_config()
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/linux-6.1.9/drivers/media/platform/renesas/rcar-vin/ |
D | rcar-csi2.c | 565 const u32 lane_mask = (1 << lanes) - 1; in rcsi2_wait_phy_start() local 568 (rcsi2_read(priv, PHDLM_REG) & lane_mask) == lane_mask) in rcsi2_wait_phy_start()
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/linux-6.1.9/drivers/pci/controller/ |
D | pci-tegra.c | 2003 static int tegra_pcie_get_regulators(struct tegra_pcie *pcie, u32 lane_mask) in tegra_pcie_get_regulators() argument 2051 if (lane_mask & 0x0f) in tegra_pcie_get_regulators() 2055 if (lane_mask & 0x30) in tegra_pcie_get_regulators()
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/linux-6.1.9/drivers/phy/cadence/ |
D | phy-cadence-torrent.c | 1345 u8 lane_mask = (1 << dp->lanes) - 1; in cdns_torrent_dp_set_lanes() local 1351 value |= ((~lane_mask) << PMA_TX_ELEC_IDLE_SHIFT) & in cdns_torrent_dp_set_lanes() 1363 value = (value & 0x0000FFF0) | (0x0000000E & lane_mask); in cdns_torrent_dp_set_lanes() 1369 value = (value & 0x0000FFF0) | (0x0000000F & lane_mask); in cdns_torrent_dp_set_lanes()
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/linux-6.1.9/drivers/gpu/drm/omapdrm/dss/ |
D | dsi.c | 1536 static int dsi_enable_pads(struct dsi_data *dsi, unsigned int lane_mask) in dsi_enable_pads() argument 1539 return dsi_omap4_mux_pads(dsi, lane_mask); in dsi_enable_pads() 1541 return dsi_omap5_mux_pads(dsi, lane_mask); in dsi_enable_pads()
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