Home
last modified time | relevance | path

Searched refs:ixMPLL_BYPASSCLK_SEL (Results 1 – 12 of 12) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dpolaris_baco.c67 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixMPLL_BYPASSCLK_SEL },
107 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixMPLL_BYPASSCLK_SEL },
159 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixMPLL_BYPASSCLK_SEL },
Dfiji_baco.c77 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixMPLL_BYPASSCLK_SEL },
95 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixMPLL_BYPASSCLK_SEL },
Dci_baco.c79 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixMPLL_BYPASSCLK_SEL },
112 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixMPLL_BYPASSCLK_SEL },
Dtonga_baco.c77 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixMPLL_BYPASSCLK_SEL },
103 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixMPLL_BYPASSCLK_SEL },
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/smu/
Dsmu_7_0_0_d.h55 #define ixMPLL_BYPASSCLK_SEL 0xc050019c macro
Dsmu_7_1_1_d.h55 #define ixMPLL_BYPASSCLK_SEL 0xc050019c macro
Dsmu_7_0_1_d.h56 #define ixMPLL_BYPASSCLK_SEL 0xc050019c macro
Dsmu_7_1_2_d.h56 #define ixMPLL_BYPASSCLK_SEL 0xc050019c macro
Dsmu_7_1_3_d.h59 #define ixMPLL_BYPASSCLK_SEL 0xc050019c macro
Dsmu_7_1_0_d.h55 #define ixMPLL_BYPASSCLK_SEL 0xc050019c macro
/linux-6.1.9/drivers/gpu/drm/amd/amdgpu/
Dcik.c1848 orig = data = RREG32_SMC(ixMPLL_BYPASSCLK_SEL); in cik_program_aspm()
1852 WREG32_SMC(ixMPLL_BYPASSCLK_SEL, data); in cik_program_aspm()
Dvi.c1245 orig = data = RREG32_SMC(ixMPLL_BYPASSCLK_SEL); in vi_program_aspm()
1249 WREG32_SMC(ixMPLL_BYPASSCLK_SEL, data); in vi_program_aspm()