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Searched refs:ixAZF0ENDPOINT6_AZALIA_F0_CODEC_CONVERTER_CONTROL_RAMP_RATE (Results 1 – 14 of 14) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_offset.h8071 #define ixAZF0ENDPOINT6_AZALIA_F0_CODEC_CONVERTER_CONTROL_RAMP_RATE … macro
Ddcn_3_0_1_offset.h12914 #define ixAZF0ENDPOINT6_AZALIA_F0_CODEC_CONVERTER_CONTROL_RAMP_RATE … macro
Ddcn_1_0_offset.h13758 #define ixAZF0ENDPOINT6_AZALIA_F0_CODEC_CONVERTER_CONTROL_RAMP_RATE … macro
Ddcn_2_1_0_offset.h13518 #define ixAZF0ENDPOINT6_AZALIA_F0_CODEC_CONVERTER_CONTROL_RAMP_RATE … macro
Ddcn_3_1_2_offset.h14728 #define ixAZF0ENDPOINT6_AZALIA_F0_CODEC_CONVERTER_CONTROL_RAMP_RATE … macro
Ddcn_3_1_4_offset.h829 #define ixAZF0ENDPOINT6_AZALIA_F0_CODEC_CONVERTER_CONTROL_RAMP_RATE … macro
Ddcn_3_1_5_offset.h14834 #define ixAZF0ENDPOINT6_AZALIA_F0_CODEC_CONVERTER_CONTROL_RAMP_RATE … macro
Ddcn_3_2_0_offset.h14225 #define ixAZF0ENDPOINT6_AZALIA_F0_CODEC_CONVERTER_CONTROL_RAMP_RATE … macro
Ddcn_3_2_1_offset.h14204 #define ixAZF0ENDPOINT6_AZALIA_F0_CODEC_CONVERTER_CONTROL_RAMP_RATE … macro
Ddcn_3_0_2_offset.h15803 #define ixAZF0ENDPOINT6_AZALIA_F0_CODEC_CONVERTER_CONTROL_RAMP_RATE … macro
Ddcn_3_1_6_offset.h15325 #define ixAZF0ENDPOINT6_AZALIA_F0_CODEC_CONVERTER_CONTROL_RAMP_RATE … macro
Ddcn_2_0_0_offset.h17182 #define ixAZF0ENDPOINT6_AZALIA_F0_CODEC_CONVERTER_CONTROL_RAMP_RATE … macro
Ddcn_3_0_0_offset.h17524 #define ixAZF0ENDPOINT6_AZALIA_F0_CODEC_CONVERTER_CONTROL_RAMP_RATE … macro
/linux-6.1.9/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_12_0_offset.h17571 #define ixAZF0ENDPOINT6_AZALIA_F0_CODEC_CONVERTER_CONTROL_RAMP_RATE … macro