Searched refs:intel_guc_ggtt_offset (Results 1 – 9 of 9) sorted by relevance
| /linux-6.1.9/drivers/gpu/drm/i915/gt/uc/ |
| D | intel_guc_ads.c | 421 addr_ggtt = intel_guc_ggtt_offset(guc, guc->ads_vma) + offset; in guc_mmio_reg_state_init()
495 addr_ggtt = intel_guc_ggtt_offset(guc, guc->ads_vma) + offset; in guc_prep_golden_context()
582 addr_ggtt = intel_guc_ggtt_offset(guc, guc->ads_vma) + offset; in guc_init_golden_context()
635 ads_ggtt = intel_guc_ggtt_offset(guc, guc->ads_vma); in guc_capture_prep_lists()
767 base = intel_guc_ggtt_offset(guc, guc->ads_vma); in __guc_ads_init()
893 return intel_guc_ggtt_offset(guc, guc->ads_vma) + in intel_guc_engine_usage_offset()
|
| D | intel_guc_hwconfig.c | 84 ggtt_offset = intel_guc_ggtt_offset(guc, vma); in guc_hwconfig_fill_buffer()
|
| D | intel_guc_fw.c | 69 intel_guc_ggtt_offset(guc, guc_fw->rsa_data)); in guc_xfer_rsa_vma()
|
| D | intel_huc.c | 157 ret = intel_guc_auth_huc(guc, intel_guc_ggtt_offset(guc, huc->fw.rsa_data)); in intel_huc_auth()
|
| D | intel_guc_slpc.c | 164 u32 offset = intel_guc_ggtt_offset(guc, slpc->vma); in slpc_query_task_state()
322 u32 offset = intel_guc_ggtt_offset(guc, slpc->vma); in slpc_reset()
|
| D | intel_guc.h | 340 static inline u32 intel_guc_ggtt_offset(struct intel_guc *guc, in intel_guc_ggtt_offset() function
|
| D | intel_guc.c | 232 offset = intel_guc_ggtt_offset(guc, log->vma) >> PAGE_SHIFT; in guc_ctl_log_params_flags()
248 u32 ads = intel_guc_ggtt_offset(guc, guc->ads_vma) >> PAGE_SHIFT; in guc_ctl_ads_flags()
|
| D | intel_guc_ct.c | 243 CT_DEBUG(ct, "base=%#x size=%u\n", intel_guc_ggtt_offset(guc, ct->vma), blob_size); in intel_guc_ct_init()
303 base = intel_guc_ggtt_offset(guc, ct->vma); in intel_guc_ct_enable()
|
| D | intel_guc_submission.c | 2277 u32 offset = intel_guc_ggtt_offset(guc, guc->lrc_desc_pool_v69) + in register_context_v69()
|