| /linux-6.1.9/drivers/gpu/drm/i915/display/ |
| D | intel_de.h | 45 intel_de_wait_for_set(struct drm_i915_private *i915, i915_reg_t reg, in intel_de_wait_for_set() function
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| D | vlv_dsi.c | 94 if (intel_de_wait_for_set(dev_priv, MIPI_GEN_FIFO_STAT(port), in vlv_dsi_wait_for_fifo_empty()
189 if (intel_de_wait_for_set(dev_priv, MIPI_INTR_STAT(port), in intel_dsi_host_transfer()
249 if (intel_de_wait_for_set(dev_priv, MIPI_INTR_STAT(port), mask, 100)) in dpi_send_cmd()
363 if (intel_de_wait_for_set(dev_priv, MIPI_CTRL(port), in glk_dsi_enable_io()
386 if (intel_de_wait_for_set(dev_priv, MIPI_CTRL(port), in glk_dsi_device_ready()
436 if (intel_de_wait_for_set(dev_priv, MIPI_CTRL(port), in glk_dsi_device_ready()
444 if (intel_de_wait_for_set(dev_priv, BXT_MIPI_PORT_CTRL(port), in glk_dsi_device_ready()
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| D | hsw_ips.c | 48 if (intel_de_wait_for_set(i915, IPS_CTL, IPS_ENABLE, 50)) in hsw_ips_enable()
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| D | intel_pch_display.c | 299 if (intel_de_wait_for_set(dev_priv, reg, TRANS_STATE_ENABLE, 100)) in ilk_enable_pch_transcoder()
575 if (intel_de_wait_for_set(dev_priv, LPT_TRANSCONF, in lpt_enable_pch_transcoder()
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| D | intel_hdcp.c | 354 if (intel_de_wait_for_set(dev_priv, HDCP_REP_CTL, HDCP_SHA1_READY, 1)) { in intel_write_sha_text()
633 if (intel_de_wait_for_set(dev_priv, HDCP_REP_CTL, in intel_hdcp_validate_v_prime()
781 if (intel_de_wait_for_set(dev_priv, in intel_hdcp_auth()
876 if (intel_de_wait_for_set(dev_priv, in intel_hdcp_auth()
1829 ret = intel_de_wait_for_set(dev_priv, in hdcp2_enable_encryption()
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| D | intel_display_power_well.c | 266 if (intel_de_wait_for_set(dev_priv, regs->driver, in hsw_wait_for_power_well_enable()
326 intel_de_wait_for_set(dev_priv, SKL_FUSE_STATUS, in gen9_wait_for_power_well_fuses()
1430 if (intel_de_wait_for_set(dev_priv, DISPLAY_PHY_STATUS, in chv_dpio_cmn_power_well_enable()
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| D | vlv_dsi_pll.c | 567 if (intel_de_wait_for_set(dev_priv, BXT_DSI_PLL_ENABLE, in bxt_dsi_pll_enable()
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| D | intel_cdclk.c | 1026 if (intel_de_wait_for_set(dev_priv, LCPLL1_CTL, LCPLL_PLL_LOCK, 5)) in skl_dpll0_enable()
1570 if (intel_de_wait_for_set(dev_priv, in bxt_de_pll_enable()
1601 if (intel_de_wait_for_set(dev_priv, BXT_DE_PLL_ENABLE, BXT_DE_PLL_LOCK, 1)) in icl_cdclk_pll_enable()
1621 if (intel_de_wait_for_set(dev_priv, BXT_DE_PLL_ENABLE, in adlp_cdclk_pll_crawl()
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| D | intel_lvds.c | 325 if (intel_de_wait_for_set(dev_priv, PP_STATUS(0), PP_ON, 5000)) in intel_enable_lvds()
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| D | intel_dp_mst.c | 350 if (intel_de_wait_for_set(i915, dp_tp_status_reg(encoder, crtc_state), in wait_for_act_sent()
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| D | intel_dpll.c | 1724 if (intel_de_wait_for_set(dev_priv, DPLL(pipe), DPLL_LOCK_VLV, 1)) in _vlv_enable_pll()
1876 if (intel_de_wait_for_set(dev_priv, DPLL(pipe), DPLL_LOCK_VLV, 1)) in _chv_enable_pll()
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| D | intel_dpio_phy.c | 361 if (intel_de_wait_for_set(dev_priv, BXT_PORT_REF_DW3(phy), in bxt_phy_wait_grc_done()
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| D | intel_dpll_mgr.c | 1290 if (intel_de_wait_for_set(dev_priv, DPLL_STATUS, DPLL_LOCK(id), 5)) in skl_ddi_pll_enable()
3806 if (intel_de_wait_for_set(dev_priv, enable_reg, PLL_POWER_STATE, 1)) in icl_pll_power_enable()
3822 if (intel_de_wait_for_set(dev_priv, enable_reg, PLL_LOCK, 1)) in icl_pll_enable()
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| D | intel_snps_phy.c | 1804 if (intel_de_wait_for_set(dev_priv, enable_reg, PLL_LOCK, 5)) in intel_mpllb_enable()
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| D | intel_display_power.c | 1296 if (intel_de_wait_for_set(dev_priv, LCPLL_CTL, LCPLL_PLL_LOCK, 5)) in hsw_restore_lcpll()
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| D | icl_dsi.c | 1055 if (intel_de_wait_for_set(dev_priv, PIPECONF(dsi_trans), in gen11_dsi_enable_transcoder()
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| D | intel_ddi.c | 3197 if (intel_de_wait_for_set(dev_priv, in intel_ddi_set_idle_link_train()
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