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Searched refs:int_mask_class2_RW (Results 1 – 3 of 3) sorted by relevance

/linux-6.1.9/arch/powerpc/platforms/cell/spufs/
Dbacking_ops.c97 ctx->csa.priv1.int_mask_class2_RW |= in spu_backing_mbox_stat_poll()
107 ctx->csa.priv1.int_mask_class2_RW |= in spu_backing_mbox_stat_poll()
132 ctx->csa.priv1.int_mask_class2_RW |= CLASS2_ENABLE_MAILBOX_INTR; in spu_backing_ibox_read()
162 ctx->csa.priv1.int_mask_class2_RW |= in spu_backing_wbox_write()
Dswitch.c114 csa->priv1.int_mask_class2_RW = spu_int_mask_get(spu, 2); in disable_interrupts()
1771 spu_int_mask_set(spu, 2, csa->priv1.int_mask_class2_RW); in reenable_interrupts()
2158 csa->priv1.int_mask_class2_RW = CLASS2_ENABLE_SPU_STOP_INTR | in init_priv1()
/linux-6.1.9/arch/powerpc/include/asm/
Dspu_csa.h130 u64 int_mask_class2_RW; member