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Searched refs:inbox1 (Results 1 – 8 of 8) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/display/dmub/src/
Ddmub_dcn20.c274 const struct dmub_region *inbox1) in dmub_dcn20_setup_mailbox() argument
278 REG_WRITE(DMCUB_INBOX1_BASE_ADDRESS, inbox1->base); in dmub_dcn20_setup_mailbox()
282 REG_WRITE(DMCUB_INBOX1_SIZE, inbox1->top - inbox1->base); in dmub_dcn20_setup_mailbox()
Ddmub_dcn31.c239 const struct dmub_region *inbox1) in dmub_dcn31_setup_mailbox() argument
241 REG_WRITE(DMCUB_INBOX1_BASE_ADDRESS, inbox1->base); in dmub_dcn31_setup_mailbox()
242 REG_WRITE(DMCUB_INBOX1_SIZE, inbox1->top - inbox1->base); in dmub_dcn31_setup_mailbox()
Ddmub_dcn32.c262 const struct dmub_region *inbox1) in dmub_dcn32_setup_mailbox() argument
264 REG_WRITE(DMCUB_INBOX1_BASE_ADDRESS, inbox1->base); in dmub_dcn32_setup_mailbox()
265 REG_WRITE(DMCUB_INBOX1_SIZE, inbox1->top - inbox1->base); in dmub_dcn32_setup_mailbox()
Ddmub_srv.c517 struct dmub_region inbox1, outbox1, outbox0; in dmub_srv_hw_init() local
579 inbox1.base = cw4.region.base; in dmub_srv_hw_init()
580 inbox1.top = cw4.region.base + DMUB_RB_SIZE; in dmub_srv_hw_init()
581 outbox1.base = inbox1.top; in dmub_srv_hw_init()
606 dmub->hw_funcs.setup_mailbox(dmub, &inbox1); in dmub_srv_hw_init()
Ddmub_dcn20.h203 const struct dmub_region *inbox1);
Ddmub_dcn31.h205 const struct dmub_region *inbox1);
Ddmub_dcn32.h207 const struct dmub_region *inbox1);
/linux-6.1.9/drivers/gpu/drm/amd/display/dmub/
Ddmub_srv.h327 const struct dmub_region *inbox1);