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Searched refs:imx_clk_hw_busy_divider (Results 1 – 7 of 7) sorted by relevance

/linux-6.1.9/drivers/clk/imx/
Dclk-imx6sl.c329 …hws[IMX6SL_CLK_OCRAM_PODF] = imx_clk_hw_busy_divider("ocram_podf", "ocram_sel", b… in imx6sl_clocks_init()
364 …hws[IMX6SL_CLK_AHB] = imx_clk_hw_busy_divider("ahb", "periph", base + 0x14, 10, 3, … in imx6sl_clocks_init()
365 …hws[IMX6SL_CLK_MMDC_ROOT] = imx_clk_hw_busy_divider("mmdc", "periph2", base + 0x14, 3, 3, … in imx6sl_clocks_init()
366 …hws[IMX6SL_CLK_ARM] = imx_clk_hw_busy_divider("arm", "pll1_sw", base + 0x10, 0, 3, … in imx6sl_clocks_init()
Dclk-imx6sll.c244 …hws[IMX6SLL_CLK_ARM] = imx_clk_hw_busy_divider("arm", "pll1_sw", base + 0x10, 0, 3, base + 0x48… in imx6sll_clocks_init()
245 …hws[IMX6SLL_CLK_MMDC_PODF] = imx_clk_hw_busy_divider("mmdc_podf", "periph2", base + 0x14, 3, 3, … in imx6sll_clocks_init()
246 …hws[IMX6SLL_CLK_AXI_PODF] = imx_clk_hw_busy_divider("axi", "axi_sel", base + 0x14, 16, 3, base +… in imx6sll_clocks_init()
247 …hws[IMX6SLL_CLK_AHB] = imx_clk_hw_busy_divider("ahb", "periph", base + 0x14, 10, 3, base + 0x48… in imx6sll_clocks_init()
Dclk-imx6q.c778 …hws[IMX6QDL_CLK_AXI] = imx_clk_hw_busy_divider("axi", "axi_sel", b… in imx6q_clocks_init()
779 …hws[IMX6QDL_CLK_MMDC_CH0_AXI_PODF] = imx_clk_hw_busy_divider("mmdc_ch0_axi_podf", "periph", b… in imx6q_clocks_init()
782 …hws[IMX6QDL_CLK_MMDC_CH1_AXI_PODF] = imx_clk_hw_busy_divider("mmdc_ch1_axi_podf", "mmdc_ch1_axi_cg… in imx6q_clocks_init()
784 …hws[IMX6QDL_CLK_MMDC_CH1_AXI_PODF] = imx_clk_hw_busy_divider("mmdc_ch1_axi_podf", "periph2", b… in imx6q_clocks_init()
786 …hws[IMX6QDL_CLK_ARM] = imx_clk_hw_busy_divider("arm", "pll1_sw", b… in imx6q_clocks_init()
787 …hws[IMX6QDL_CLK_AHB] = imx_clk_hw_busy_divider("ahb", "periph", b… in imx6q_clocks_init()
Dclk-imx6ul.c327 …hws[IMX6UL_CLK_ARM] = imx_clk_hw_busy_divider("arm", "pll1_sw", base + 0x10, 0, 3, base + 0… in imx6ul_clocks_init()
328 …hws[IMX6UL_CLK_MMDC_PODF] = imx_clk_hw_busy_divider("mmdc_podf", "periph2", base + 0x14, 3, 3, … in imx6ul_clocks_init()
329 …hws[IMX6UL_CLK_AXI_PODF] = imx_clk_hw_busy_divider("axi_podf", "axi_sel", base + 0x14, 16, 3, b… in imx6ul_clocks_init()
330 …hws[IMX6UL_CLK_AHB] = imx_clk_hw_busy_divider("ahb", "periph", base + 0x14, 10, 3, base + 0… in imx6ul_clocks_init()
Dclk-imx6sx.c363 …hws[IMX6SX_CLK_OCRAM_PODF] = imx_clk_hw_busy_divider("ocram_podf", "ocram_sel", base + 0x14… in imx6sx_clocks_init()
364 …hws[IMX6SX_CLK_AHB] = imx_clk_hw_busy_divider("ahb", "periph", base + 0x14… in imx6sx_clocks_init()
365 …hws[IMX6SX_CLK_MMDC_PODF] = imx_clk_hw_busy_divider("mmdc_podf", "periph2", base + 0x14… in imx6sx_clocks_init()
366 …hws[IMX6SX_CLK_ARM] = imx_clk_hw_busy_divider("arm", "pll1_sw", base + 0x10… in imx6sx_clocks_init()
Dclk-busy.c76 struct clk_hw *imx_clk_hw_busy_divider(const char *name, const char *parent_name, in imx_clk_hw_busy_divider() function
Dclk.h303 struct clk_hw *imx_clk_hw_busy_divider(const char *name, const char *parent_name,