| /linux-6.1.9/drivers/net/ethernet/mellanox/mlx5/core/steering/ |
| D | dr_ste_v1.h | 10 void dr_ste_v1_set_miss_addr(u8 *hw_ste_p, u64 miss_addr);
11 u64 dr_ste_v1_get_miss_addr(u8 *hw_ste_p);
12 void dr_ste_v1_set_byte_mask(u8 *hw_ste_p, u16 byte_mask);
13 u16 dr_ste_v1_get_byte_mask(u8 *hw_ste_p);
14 void dr_ste_v1_set_next_lu_type(u8 *hw_ste_p, u16 lu_type);
15 u16 dr_ste_v1_get_next_lu_type(u8 *hw_ste_p);
16 void dr_ste_v1_set_hit_addr(u8 *hw_ste_p, u64 icm_addr, u32 ht_size);
17 void dr_ste_v1_init(u8 *hw_ste_p, u16 lu_type, bool is_rx, u16 gvmi);
18 void dr_ste_v1_prepare_for_postsend(u8 *hw_ste_p, u32 ste_size);
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| D | dr_ste_v0.c | 236 static void dr_ste_v0_set_entry_type(u8 *hw_ste_p, u8 entry_type) in dr_ste_v0_set_entry_type() argument
238 MLX5_SET(ste_general, hw_ste_p, entry_type, entry_type); in dr_ste_v0_set_entry_type()
241 static u8 dr_ste_v0_get_entry_type(u8 *hw_ste_p) in dr_ste_v0_get_entry_type() argument
243 return MLX5_GET(ste_general, hw_ste_p, entry_type); in dr_ste_v0_get_entry_type()
246 static void dr_ste_v0_set_miss_addr(u8 *hw_ste_p, u64 miss_addr) in dr_ste_v0_set_miss_addr() argument
251 MLX5_SET(ste_rx_steering_mult, hw_ste_p, miss_address_39_32, index >> 26); in dr_ste_v0_set_miss_addr()
252 MLX5_SET(ste_rx_steering_mult, hw_ste_p, miss_address_31_6, index); in dr_ste_v0_set_miss_addr()
255 static u64 dr_ste_v0_get_miss_addr(u8 *hw_ste_p) in dr_ste_v0_get_miss_addr() argument
258 ((u64)MLX5_GET(ste_rx_steering_mult, hw_ste_p, miss_address_31_6) | in dr_ste_v0_get_miss_addr()
259 ((u64)MLX5_GET(ste_rx_steering_mult, hw_ste_p, miss_address_39_32)) << 26); in dr_ste_v0_get_miss_addr()
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| D | dr_ste.h | 150 void (*ste_init)(u8 *hw_ste_p, u16 lu_type,
152 void (*set_next_lu_type)(u8 *hw_ste_p, u16 lu_type);
153 u16 (*get_next_lu_type)(u8 *hw_ste_p);
154 void (*set_miss_addr)(u8 *hw_ste_p, u64 miss_addr);
155 u64 (*get_miss_addr)(u8 *hw_ste_p);
156 void (*set_hit_addr)(u8 *hw_ste_p, u64 icm_addr, u32 ht_size);
157 void (*set_byte_mask)(u8 *hw_ste_p, u16 byte_mask);
158 u16 (*get_byte_mask)(u8 *hw_ste_p);
199 void (*prepare_for_postsend)(u8 *hw_ste_p, u32 ste_size);
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| D | dr_ste_v1.c | 265 static void dr_ste_v1_set_entry_type(u8 *hw_ste_p, u8 entry_type) in dr_ste_v1_set_entry_type() argument
267 MLX5_SET(ste_match_bwc_v1, hw_ste_p, entry_format, entry_type); in dr_ste_v1_set_entry_type()
270 void dr_ste_v1_set_miss_addr(u8 *hw_ste_p, u64 miss_addr) in dr_ste_v1_set_miss_addr() argument
274 MLX5_SET(ste_match_bwc_v1, hw_ste_p, miss_address_39_32, index >> 26); in dr_ste_v1_set_miss_addr()
275 MLX5_SET(ste_match_bwc_v1, hw_ste_p, miss_address_31_6, index); in dr_ste_v1_set_miss_addr()
278 u64 dr_ste_v1_get_miss_addr(u8 *hw_ste_p) in dr_ste_v1_get_miss_addr() argument
281 ((u64)MLX5_GET(ste_match_bwc_v1, hw_ste_p, miss_address_31_6) | in dr_ste_v1_get_miss_addr()
282 ((u64)MLX5_GET(ste_match_bwc_v1, hw_ste_p, miss_address_39_32)) << 26); in dr_ste_v1_get_miss_addr()
287 void dr_ste_v1_set_byte_mask(u8 *hw_ste_p, u16 byte_mask) in dr_ste_v1_set_byte_mask() argument
289 MLX5_SET(ste_match_bwc_v1, hw_ste_p, byte_mask, byte_mask); in dr_ste_v1_set_byte_mask()
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| D | dr_ste.c | 26 u32 mlx5dr_ste_calc_hash_index(u8 *hw_ste_p, struct mlx5dr_ste_htbl *htbl) in mlx5dr_ste_calc_hash_index() argument
29 struct dr_hw_ste_format *hw_ste = (struct dr_hw_ste_format *)hw_ste_p; in mlx5dr_ste_calc_hash_index()
67 static u8 *dr_ste_get_tag(u8 *hw_ste_p) in dr_ste_get_tag() argument
69 struct dr_hw_ste_format *hw_ste = (struct dr_hw_ste_format *)hw_ste_p; in dr_ste_get_tag()
74 void mlx5dr_ste_set_bit_mask(u8 *hw_ste_p, u8 *bit_mask) in mlx5dr_ste_set_bit_mask() argument
76 struct dr_hw_ste_format *hw_ste = (struct dr_hw_ste_format *)hw_ste_p; in mlx5dr_ste_set_bit_mask()
94 u8 *hw_ste_p, u64 miss_addr) in mlx5dr_ste_set_miss_addr() argument
96 ste_ctx->set_miss_addr(hw_ste_p, miss_addr); in mlx5dr_ste_set_miss_addr()
383 u8 *hw_ste_p, u32 ste_size) in mlx5dr_ste_prepare_for_postsend() argument
386 ste_ctx->prepare_for_postsend(hw_ste_p, ste_size); in mlx5dr_ste_prepare_for_postsend()
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| D | dr_types.h | 237 u32 mlx5dr_ste_calc_hash_index(u8 *hw_ste_p, struct mlx5dr_ste_htbl *htbl);
245 void mlx5dr_ste_set_bit_mask(u8 *hw_ste_p, u8 *bit_mask);
1310 u8 *hw_ste_p, u32 ste_size);
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