Searched refs:harvest_config (Results 1 – 19 of 19) sorted by relevance
83 if (adev->vce.harvest_config == 0 || in vce_v3_0_ring_get_rptr()84 adev->vce.harvest_config == AMDGPU_VCE_HARVEST_VCE1) in vce_v3_0_ring_get_rptr()86 else if (adev->vce.harvest_config == AMDGPU_VCE_HARVEST_VCE0) in vce_v3_0_ring_get_rptr()115 if (adev->vce.harvest_config == 0 || in vce_v3_0_ring_get_wptr()116 adev->vce.harvest_config == AMDGPU_VCE_HARVEST_VCE1) in vce_v3_0_ring_get_wptr()118 else if (adev->vce.harvest_config == AMDGPU_VCE_HARVEST_VCE0) in vce_v3_0_ring_get_wptr()146 if (adev->vce.harvest_config == 0 || in vce_v3_0_ring_set_wptr()147 adev->vce.harvest_config == AMDGPU_VCE_HARVEST_VCE1) in vce_v3_0_ring_set_wptr()149 else if (adev->vce.harvest_config == AMDGPU_VCE_HARVEST_VCE0) in vce_v3_0_ring_set_wptr()272 if (adev->vce.harvest_config & (1 << idx)) in vce_v3_0_start()[all …]
67 adev->jpeg.harvest_config |= 1 << i; in jpeg_v2_5_early_init()69 if (adev->jpeg.harvest_config == (AMDGPU_JPEG_HARVEST_JPEG0 | in jpeg_v2_5_early_init()94 if (adev->jpeg.harvest_config & (1 << i)) in jpeg_v2_5_sw_init()125 if (adev->jpeg.harvest_config & (1 << i)) in jpeg_v2_5_sw_init()178 if (adev->jpeg.harvest_config & (1 << i)) in jpeg_v2_5_hw_init()210 if (adev->jpeg.harvest_config & (1 << i)) in jpeg_v2_5_hw_fini()318 if (adev->jpeg.harvest_config & (1 << i)) in jpeg_v2_5_start()372 if (adev->jpeg.harvest_config & (1 << i)) in jpeg_v2_5_stop()483 if (adev->jpeg.harvest_config & (1 << i)) in jpeg_v2_5_is_idle()500 if (adev->jpeg.harvest_config & (1 << i)) in jpeg_v2_5_wait_for_idle()[all …]
86 adev->vcn.harvest_config = 0; in vcn_v2_5_early_init()95 adev->vcn.harvest_config |= 1 << i; in vcn_v2_5_early_init()97 if (adev->vcn.harvest_config == (AMDGPU_VCN_HARVEST_VCN0 | in vcn_v2_5_early_init()127 if (adev->vcn.harvest_config & (1 << j)) in vcn_v2_5_sw_init()163 if (adev->vcn.harvest_config & (1 << j)) in vcn_v2_5_sw_init()245 if (adev->vcn.harvest_config & (1 << i)) in vcn_v2_5_sw_fini()283 if (adev->vcn.harvest_config & (1 << j)) in vcn_v2_5_hw_init()334 if (adev->vcn.harvest_config & (1 << i)) in vcn_v2_5_hw_fini()402 if (adev->vcn.harvest_config & (1 << i)) in vcn_v2_5_mc_resume()559 if (adev->vcn.harvest_config & (1 << i)) in vcn_v2_5_disable_clock_gating()[all …]
376 adev->uvd.harvest_config |= 1 << i; in uvd_v7_0_early_init()379 if (adev->uvd.harvest_config == (AMDGPU_UVD_HARVEST_UVD0 | in uvd_v7_0_early_init()406 if (adev->uvd.harvest_config & (1 << j)) in uvd_v7_0_sw_init()443 if (adev->uvd.harvest_config & (1 << j)) in uvd_v7_0_sw_init()504 if (adev->uvd.harvest_config & (1 << j)) in uvd_v7_0_sw_fini()534 if (adev->uvd.harvest_config & (1 << j)) in uvd_v7_0_hw_init()675 if (adev->uvd.harvest_config & (1 << i)) in uvd_v7_0_mc_resume()754 if (adev->uvd.harvest_config & (1 << i)) in uvd_v7_0_mmsch_start()812 if (adev->uvd.harvest_config & (1 << i)) in uvd_v7_0_sriov_start()957 if (adev->uvd.harvest_config & (1 << k)) in uvd_v7_0_start()[all …]
93 adev->vcn.harvest_config = 0; in vcn_v3_0_early_init()97 if (adev->vcn.harvest_config == (AMDGPU_VCN_HARVEST_VCN0 | in vcn_v3_0_early_init()155 if (adev->vcn.harvest_config & (1 << i)) in vcn_v3_0_sw_init()263 if (adev->vcn.harvest_config & (1 << i)) in vcn_v3_0_sw_fini()305 if (adev->vcn.harvest_config & (1 << i)) in vcn_v3_0_hw_init()336 if (adev->vcn.harvest_config & (1 << i)) in vcn_v3_0_hw_init()380 if (adev->vcn.harvest_config & (1 << i)) in vcn_v3_0_hw_fini()1104 if (adev->vcn.harvest_config & (1 << i)) in vcn_v3_0_start()1322 if (adev->vcn.harvest_config & (1 << i)) in vcn_v3_0_start_sriov()1527 if (adev->vcn.harvest_config & (1 << i)) in vcn_v3_0_stop()[all …]
80 adev->vcn.harvest_config = VCN_HARVEST_MMSCH; in vcn_v4_0_early_init()117 if (adev->vcn.harvest_config & (1 << i)) in vcn_v4_0_sw_init()185 if (adev->vcn.harvest_config & (1 << i)) in vcn_v4_0_sw_fini()227 if (adev->vcn.harvest_config & (1 << i)) in vcn_v4_0_hw_init()244 if (adev->vcn.harvest_config & (1 << i)) in vcn_v4_0_hw_init()282 if (adev->vcn.harvest_config & (1 << i)) in vcn_v4_0_hw_fini()1209 if (adev->vcn.harvest_config & (1 << i)) in vcn_v4_0_start_sriov()1764 if (adev->vcn.harvest_config & (1 << i)) in vcn_v4_0_set_unified_ring_funcs()1787 if (adev->vcn.harvest_config & (1 << i)) in vcn_v4_0_is_idle()1809 if (adev->vcn.harvest_config & (1 << i)) in vcn_v4_0_wait_for_idle()[all …]
51 if (adev->jpeg.harvest_config & (1 << i)) in amdgpu_jpeg_sw_fini()82 if (adev->jpeg.harvest_config & (1 << i)) in amdgpu_jpeg_idle_work_handler()
52 unsigned harvest_config; member
50 unsigned harvest_config; member
67 unsigned harvest_config; member
273 if (adev->vcn.harvest_config & (1 << i)) in amdgpu_vcn_sw_init()316 if (adev->vcn.harvest_config & (1 << j)) in amdgpu_vcn_sw_fini()380 if (adev->vcn.harvest_config & (1 << i)) in amdgpu_vcn_suspend()407 if (adev->vcn.harvest_config & (1 << i)) in amdgpu_vcn_resume()452 if (adev->vcn.harvest_config & (1 << j)) in amdgpu_vcn_idle_work_handler()1111 if (adev->vcn.harvest_config & (1 << i)) in amdgpu_vcn_setup_ucode()
331 if (adev->uvd.harvest_config & (1 << j)) in amdgpu_uvd_sw_init()383 if (adev->uvd.harvest_config & (1 << j)) in amdgpu_uvd_sw_fini()446 if (adev->uvd.harvest_config & (1 << j)) in amdgpu_uvd_suspend()482 if (adev->uvd.harvest_config & (1 << i)) in amdgpu_uvd_resume()1276 if (adev->uvd.harvest_config & (1 << i)) in amdgpu_uvd_idle_work_handler()
400 if (adev->uvd.harvest_config & (1 << i)) in amdgpu_hw_ip_info()420 if (adev->uvd.harvest_config & (1 << i)) in amdgpu_hw_ip_info()433 if (adev->uvd.harvest_config & (1 << i)) in amdgpu_hw_ip_info()445 if (adev->uvd.harvest_config & (1 << i)) in amdgpu_hw_ip_info()460 if (adev->jpeg.harvest_config & (1 << i)) in amdgpu_hw_ip_info()832 dev_info->vce_harvest_config = adev->vce.harvest_config; in amdgpu_info_ioctl()
704 mask |= (adev->vce.harvest_config & AMDGPU_VCE_HARVEST_VCE0) ? 0 : SRBM_STATUS2__VCE0_BUSY_MASK;705 mask |= (adev->vce.harvest_config & AMDGPU_VCE_HARVEST_VCE1) ? 0 : SRBM_STATUS2__VCE1_BUSY_MASK;936 if (adev->vce.harvest_config & (1 << i))
268 unsigned harvest_config; member
279 adev->vcn.harvest_config |= AMDGPU_VCN_HARVEST_VCN1; in amdgpu_discovery_harvest_config_quirk()515 adev->vcn.harvest_config |= AMDGPU_VCN_HARVEST_VCN0; in amdgpu_discovery_read_harvest_bit_per_ip()517 adev->vcn.harvest_config |= AMDGPU_VCN_HARVEST_VCN1; in amdgpu_discovery_read_harvest_bit_per_ip()559 adev->vcn.harvest_config |= AMDGPU_VCN_HARVEST_VCN0; in amdgpu_discovery_read_from_harvest_table()561 adev->vcn.harvest_config |= AMDGPU_VCN_HARVEST_VCN1; in amdgpu_discovery_read_from_harvest_table()
1989 if (adev->vcn.harvest_config & (1 << i)) in amdgpu_debugfs_init()
1842 if (adev->vcn.harvest_config & (1 << i)) in smu_v13_0_set_performance_level()1857 if (adev->vcn.harvest_config & (1 << i)) in smu_v13_0_set_performance_level()2122 if (adev->vcn.harvest_config & (1 << i)) in smu_v13_0_set_vcn_enable()
1007 if (adev->vcn.harvest_config & (1 << i)) in sienna_cichlid_set_default_dpm_table()1030 if (adev->vcn.harvest_config & (1 << i)) in sienna_cichlid_set_default_dpm_table()1131 if (adev->vcn.harvest_config & (1 << i)) in sienna_cichlid_dpm_set_vcn_enable()