Searched refs:gb_addr_config_fields (Results 1 – 6 of 6) sorted by relevance
203 adev->gfx.config.gb_addr_config_fields.num_pipes; in fill_gfx9_tiling_info_from_device()205 adev->gfx.config.gb_addr_config_fields.num_banks; in fill_gfx9_tiling_info_from_device()207 adev->gfx.config.gb_addr_config_fields.pipe_interleave_size; in fill_gfx9_tiling_info_from_device()209 adev->gfx.config.gb_addr_config_fields.num_se; in fill_gfx9_tiling_info_from_device()211 adev->gfx.config.gb_addr_config_fields.max_compress_frags; in fill_gfx9_tiling_info_from_device()213 adev->gfx.config.gb_addr_config_fields.num_rb_per_se; in fill_gfx9_tiling_info_from_device()216 tiling_info->gfx9.num_pkrs = adev->gfx.config.gb_addr_config_fields.num_pkrs; in fill_gfx9_tiling_info_from_device()346 int pipe_xor_bits = ilog2(adev->gfx.config.gb_addr_config_fields.num_pipes); in add_gfx10_1_modifiers()391 int pipes = ilog2(adev->gfx.config.gb_addr_config_fields.num_pipes); in add_gfx9_modifiers()393 ilog2(adev->gfx.config.gb_addr_config_fields.num_se)); in add_gfx9_modifiers()[all …]
672 num_pkrs = adev->gfx.config.gb_addr_config_fields.num_pkrs; in convert_tiling_flags_to_modifier()673 num_pipes = adev->gfx.config.gb_addr_config_fields.num_pipes; in convert_tiling_flags_to_modifier()747 packers = ilog2(adev->gfx.config.gb_addr_config_fields.num_pkrs); in convert_tiling_flags_to_modifier()752 ilog2(adev->gfx.config.gb_addr_config_fields.num_pkrs)); in convert_tiling_flags_to_modifier()758 rb = ilog2(adev->gfx.config.gb_addr_config_fields.num_se) + in convert_tiling_flags_to_modifier()759 ilog2(adev->gfx.config.gb_addr_config_fields.num_rb_per_se); in convert_tiling_flags_to_modifier()761 ilog2(adev->gfx.config.gb_addr_config_fields.num_se)); in convert_tiling_flags_to_modifier()763 ilog2(adev->gfx.config.gb_addr_config_fields.num_banks)); in convert_tiling_flags_to_modifier()
169 struct gb_addr_config gb_addr_config_fields; member
4243 adev->gfx.config.gb_addr_config_fields.num_pkrs = in get_gb_addr_config()4248 adev->gfx.config.gb_addr_config_fields.num_pipes = 1 << in get_gb_addr_config()4253 adev->gfx.config.gb_addr_config_fields.num_pipes; in get_gb_addr_config()4255 adev->gfx.config.gb_addr_config_fields.max_compress_frags = 1 << in get_gb_addr_config()4258 adev->gfx.config.gb_addr_config_fields.num_rb_per_se = 1 << in get_gb_addr_config()4261 adev->gfx.config.gb_addr_config_fields.num_se = 1 << in get_gb_addr_config()4264 adev->gfx.config.gb_addr_config_fields.pipe_interleave_size = 1 << (8 + in get_gb_addr_config()
2033 adev->gfx.config.gb_addr_config_fields.num_pipes = 1 << in gfx_v9_0_gpu_early_init()2040 adev->gfx.config.gb_addr_config_fields.num_pipes; in gfx_v9_0_gpu_early_init()2042 adev->gfx.config.gb_addr_config_fields.num_banks = 1 << in gfx_v9_0_gpu_early_init()2047 adev->gfx.config.gb_addr_config_fields.max_compress_frags = 1 << in gfx_v9_0_gpu_early_init()2052 adev->gfx.config.gb_addr_config_fields.num_rb_per_se = 1 << in gfx_v9_0_gpu_early_init()2057 adev->gfx.config.gb_addr_config_fields.num_se = 1 << in gfx_v9_0_gpu_early_init()2062 adev->gfx.config.gb_addr_config_fields.pipe_interleave_size = 1 << (8 + in gfx_v9_0_gpu_early_init()
4483 adev->gfx.config.gb_addr_config_fields.num_pkrs = in gfx_v10_0_gpu_early_init()4502 adev->gfx.config.gb_addr_config_fields.num_pipes = 1 << in gfx_v10_0_gpu_early_init()4507 adev->gfx.config.gb_addr_config_fields.num_pipes; in gfx_v10_0_gpu_early_init()4509 adev->gfx.config.gb_addr_config_fields.max_compress_frags = 1 << in gfx_v10_0_gpu_early_init()4512 adev->gfx.config.gb_addr_config_fields.num_rb_per_se = 1 << in gfx_v10_0_gpu_early_init()4515 adev->gfx.config.gb_addr_config_fields.num_se = 1 << in gfx_v10_0_gpu_early_init()4518 adev->gfx.config.gb_addr_config_fields.pipe_interleave_size = 1 << (8 + in gfx_v10_0_gpu_early_init()