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Searched refs:gb_addr_config (Results 1 – 25 of 40) sorted by relevance

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/linux-6.1.9/drivers/gpu/drm/amd/amdgpu/
Dvcn_v1_0.c344 adev->gfx.config.gb_addr_config); in vcn_v1_0_mc_resume_spg_mode()
346 adev->gfx.config.gb_addr_config); in vcn_v1_0_mc_resume_spg_mode()
348 adev->gfx.config.gb_addr_config); in vcn_v1_0_mc_resume_spg_mode()
350 adev->gfx.config.gb_addr_config); in vcn_v1_0_mc_resume_spg_mode()
352 adev->gfx.config.gb_addr_config); in vcn_v1_0_mc_resume_spg_mode()
354 adev->gfx.config.gb_addr_config); in vcn_v1_0_mc_resume_spg_mode()
356 adev->gfx.config.gb_addr_config); in vcn_v1_0_mc_resume_spg_mode()
358 adev->gfx.config.gb_addr_config); in vcn_v1_0_mc_resume_spg_mode()
360 adev->gfx.config.gb_addr_config); in vcn_v1_0_mc_resume_spg_mode()
362 adev->gfx.config.gb_addr_config); in vcn_v1_0_mc_resume_spg_mode()
[all …]
Dgfx_v6_0.c1578 u32 gb_addr_config = 0; in gfx_v6_0_constants_init() local
1600 gb_addr_config = TAHITI_GB_ADDR_CONFIG_GOLDEN; in gfx_v6_0_constants_init()
1617 gb_addr_config = TAHITI_GB_ADDR_CONFIG_GOLDEN; in gfx_v6_0_constants_init()
1634 gb_addr_config = VERDE_GB_ADDR_CONFIG_GOLDEN; in gfx_v6_0_constants_init()
1651 gb_addr_config = VERDE_GB_ADDR_CONFIG_GOLDEN; in gfx_v6_0_constants_init()
1668 gb_addr_config = HAINAN_GB_ADDR_CONFIG_GOLDEN; in gfx_v6_0_constants_init()
1694 gb_addr_config &= ~GB_ADDR_CONFIG__ROW_SIZE_MASK; in gfx_v6_0_constants_init()
1698 gb_addr_config |= 0 << GB_ADDR_CONFIG__ROW_SIZE__SHIFT; in gfx_v6_0_constants_init()
1701 gb_addr_config |= 1 << GB_ADDR_CONFIG__ROW_SIZE__SHIFT; in gfx_v6_0_constants_init()
1704 gb_addr_config |= 2 << GB_ADDR_CONFIG__ROW_SIZE__SHIFT; in gfx_v6_0_constants_init()
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Damdgpu_gfx.h126 struct gb_addr_config { struct
161 unsigned gb_addr_config; member
169 struct gb_addr_config gb_addr_config_fields;
Duvd_v3_1.c270 WREG32(mmUVD_UDEC_ADDR_CONFIG, adev->gfx.config.gb_addr_config); in uvd_v3_1_mc_resume()
271 WREG32(mmUVD_UDEC_DB_ADDR_CONFIG, adev->gfx.config.gb_addr_config); in uvd_v3_1_mc_resume()
272 WREG32(mmUVD_UDEC_DBW_ADDR_CONFIG, adev->gfx.config.gb_addr_config); in uvd_v3_1_mc_resume()
Duvd_v4_2.c599 WREG32(mmUVD_UDEC_ADDR_CONFIG, adev->gfx.config.gb_addr_config); in uvd_v4_2_mc_resume()
600 WREG32(mmUVD_UDEC_DB_ADDR_CONFIG, adev->gfx.config.gb_addr_config); in uvd_v4_2_mc_resume()
601 WREG32(mmUVD_UDEC_DBW_ADDR_CONFIG, adev->gfx.config.gb_addr_config); in uvd_v4_2_mc_resume()
Duvd_v5_0.c303 WREG32(mmUVD_UDEC_ADDR_CONFIG, adev->gfx.config.gb_addr_config); in uvd_v5_0_mc_resume()
304 WREG32(mmUVD_UDEC_DB_ADDR_CONFIG, adev->gfx.config.gb_addr_config); in uvd_v5_0_mc_resume()
305 WREG32(mmUVD_UDEC_DBW_ADDR_CONFIG, adev->gfx.config.gb_addr_config); in uvd_v5_0_mc_resume()
Djpeg_v3_0.c347 adev->gfx.config.gb_addr_config); in jpeg_v3_0_start()
349 adev->gfx.config.gb_addr_config); in jpeg_v3_0_start()
Dgfx_v9_0.c1919 u32 gb_addr_config; in gfx_v9_0_gpu_early_init() local
1931 gb_addr_config = VEGA10_GB_ADDR_CONFIG_GOLDEN; in gfx_v9_0_gpu_early_init()
1939 gb_addr_config = VEGA12_GB_ADDR_CONFIG_GOLDEN; in gfx_v9_0_gpu_early_init()
1949 gb_addr_config = RREG32_SOC15(GC, 0, mmGB_ADDR_CONFIG); in gfx_v9_0_gpu_early_init()
1950 gb_addr_config &= ~0xf3e777ff; in gfx_v9_0_gpu_early_init()
1951 gb_addr_config |= 0x22014042; in gfx_v9_0_gpu_early_init()
1965 gb_addr_config = RAVEN2_GB_ADDR_CONFIG_GOLDEN; in gfx_v9_0_gpu_early_init()
1967 gb_addr_config = RAVEN_GB_ADDR_CONFIG_GOLDEN; in gfx_v9_0_gpu_early_init()
1976 gb_addr_config = RREG32_SOC15(GC, 0, mmGB_ADDR_CONFIG); in gfx_v9_0_gpu_early_init()
1977 gb_addr_config &= ~0xf3e777ff; in gfx_v9_0_gpu_early_init()
[all …]
Dgfx_v7_0.c1928 WREG32(mmGB_ADDR_CONFIG, adev->gfx.config.gb_addr_config); in gfx_v7_0_constants_init()
1929 WREG32(mmHDP_ADDR_CONFIG, adev->gfx.config.gb_addr_config); in gfx_v7_0_constants_init()
1930 WREG32(mmDMIF_ADDR_CALC, adev->gfx.config.gb_addr_config); in gfx_v7_0_constants_init()
4244 u32 gb_addr_config; in gfx_v7_0_gpu_early_init() local
4265 gb_addr_config = BONAIRE_GB_ADDR_CONFIG_GOLDEN; in gfx_v7_0_gpu_early_init()
4282 gb_addr_config = HAWAII_GB_ADDR_CONFIG_GOLDEN; in gfx_v7_0_gpu_early_init()
4299 gb_addr_config = BONAIRE_GB_ADDR_CONFIG_GOLDEN; in gfx_v7_0_gpu_early_init()
4318 gb_addr_config = BONAIRE_GB_ADDR_CONFIG_GOLDEN; in gfx_v7_0_gpu_early_init()
4370 gb_addr_config &= ~GB_ADDR_CONFIG__ROW_SIZE_MASK; in gfx_v7_0_gpu_early_init()
4374 gb_addr_config |= (0 << GB_ADDR_CONFIG__ROW_SIZE__SHIFT); in gfx_v7_0_gpu_early_init()
[all …]
Dgfx_v8_0.c1681 u32 gb_addr_config; in gfx_v8_0_gpu_early_init() local
1703 gb_addr_config = TOPAZ_GB_ADDR_CONFIG_GOLDEN; in gfx_v8_0_gpu_early_init()
1720 gb_addr_config = TONGA_GB_ADDR_CONFIG_GOLDEN; in gfx_v8_0_gpu_early_init()
1735 gb_addr_config = POLARIS11_GB_ADDR_CONFIG_GOLDEN; in gfx_v8_0_gpu_early_init()
1750 gb_addr_config = TONGA_GB_ADDR_CONFIG_GOLDEN; in gfx_v8_0_gpu_early_init()
1767 gb_addr_config = TONGA_GB_ADDR_CONFIG_GOLDEN; in gfx_v8_0_gpu_early_init()
1784 gb_addr_config = CARRIZO_GB_ADDR_CONFIG_GOLDEN; in gfx_v8_0_gpu_early_init()
1801 gb_addr_config = CARRIZO_GB_ADDR_CONFIG_GOLDEN; in gfx_v8_0_gpu_early_init()
1818 gb_addr_config = TONGA_GB_ADDR_CONFIG_GOLDEN; in gfx_v8_0_gpu_early_init()
1873 gb_addr_config = REG_SET_FIELD(gb_addr_config, GB_ADDR_CONFIG, ROW_SIZE, 0); in gfx_v8_0_gpu_early_init()
[all …]
Djpeg_v2_5.c331 adev->gfx.config.gb_addr_config); in jpeg_v2_5_start()
333 adev->gfx.config.gb_addr_config); in jpeg_v2_5_start()
Dsoc21.c242 if (reg_offset == SOC15_REG_OFFSET(GC, 0, regGB_ADDR_CONFIG) && adev->gfx.config.gb_addr_config) in soc21_get_register_value()
243 return adev->gfx.config.gb_addr_config; in soc21_get_register_value()
Duvd_v6_0.c627 WREG32(mmUVD_UDEC_ADDR_CONFIG, adev->gfx.config.gb_addr_config); in uvd_v6_0_mc_resume()
628 WREG32(mmUVD_UDEC_DB_ADDR_CONFIG, adev->gfx.config.gb_addr_config); in uvd_v6_0_mc_resume()
629 WREG32(mmUVD_UDEC_DBW_ADDR_CONFIG, adev->gfx.config.gb_addr_config); in uvd_v6_0_mc_resume()
Djpeg_v4_0.c345 adev->gfx.config.gb_addr_config); in jpeg_v4_0_start()
Dgfx_v11_0.c4237 u32 gb_addr_config; in get_gb_addr_config() local
4239 gb_addr_config = RREG32_SOC15(GC, 0, regGB_ADDR_CONFIG); in get_gb_addr_config()
4240 if (gb_addr_config == 0) in get_gb_addr_config()
4244 1 << REG_GET_FIELD(gb_addr_config, GB_ADDR_CONFIG, NUM_PKRS); in get_gb_addr_config()
4246 adev->gfx.config.gb_addr_config = gb_addr_config; in get_gb_addr_config()
4249 REG_GET_FIELD(adev->gfx.config.gb_addr_config, in get_gb_addr_config()
4256 REG_GET_FIELD(adev->gfx.config.gb_addr_config, in get_gb_addr_config()
4259 REG_GET_FIELD(adev->gfx.config.gb_addr_config, in get_gb_addr_config()
4262 REG_GET_FIELD(adev->gfx.config.gb_addr_config, in get_gb_addr_config()
4265 REG_GET_FIELD(adev->gfx.config.gb_addr_config, in get_gb_addr_config()
Duvd_v7_0.c716 adev->gfx.config.gb_addr_config); in uvd_v7_0_mc_resume()
718 adev->gfx.config.gb_addr_config); in uvd_v7_0_mc_resume()
720 adev->gfx.config.gb_addr_config); in uvd_v7_0_mc_resume()
Djpeg_v2_0.c328 WREG32_SOC15(JPEG, 0, mmJPEG_DEC_GFX10_ADDR_CONFIG, adev->gfx.config.gb_addr_config); in jpeg_v2_0_start()
Dvcn_v2_5.c543 VCN, 0, mmUVD_GFX8_ADDR_CONFIG), adev->gfx.config.gb_addr_config, 0, indirect); in vcn_v2_5_mc_resume_dpg_mode()
1004 adev->gfx.config.gb_addr_config); in vcn_v2_5_start()
1006 adev->gfx.config.gb_addr_config); in vcn_v2_5_start()
/linux-6.1.9/drivers/gpu/drm/radeon/
Dni.c880 u32 gb_addr_config = 0; in cayman_gpu_init() local
913 gb_addr_config = CAYMAN_GB_ADDR_CONFIG_GOLDEN; in cayman_gpu_init()
987 gb_addr_config = ARUBA_GB_ADDR_CONFIG_GOLDEN; in cayman_gpu_init()
1018 tmp = (gb_addr_config & NUM_PIPES_MASK) >> NUM_PIPES_SHIFT; in cayman_gpu_init()
1020 tmp = (gb_addr_config & PIPE_INTERLEAVE_SIZE_MASK) >> PIPE_INTERLEAVE_SIZE_SHIFT; in cayman_gpu_init()
1022 tmp = (gb_addr_config & NUM_SHADER_ENGINES_MASK) >> NUM_SHADER_ENGINES_SHIFT; in cayman_gpu_init()
1024 tmp = (gb_addr_config & NUM_GPUS_MASK) >> NUM_GPUS_SHIFT; in cayman_gpu_init()
1026 tmp = (gb_addr_config & MULTI_GPU_TILE_SIZE_MASK) >> MULTI_GPU_TILE_SIZE_SHIFT; in cayman_gpu_init()
1028 tmp = (gb_addr_config & ROW_SIZE_MASK) >> ROW_SIZE_SHIFT; in cayman_gpu_init()
1074 ((gb_addr_config & PIPE_INTERLEAVE_SIZE_MASK) >> PIPE_INTERLEAVE_SIZE_SHIFT) << 8; in cayman_gpu_init()
[all …]
Devergreen.c3137 u32 gb_addr_config; in evergreen_gpu_init() local
3178 gb_addr_config = CYPRESS_GB_ADDR_CONFIG_GOLDEN; in evergreen_gpu_init()
3200 gb_addr_config = JUNIPER_GB_ADDR_CONFIG_GOLDEN; in evergreen_gpu_init()
3222 gb_addr_config = REDWOOD_GB_ADDR_CONFIG_GOLDEN; in evergreen_gpu_init()
3245 gb_addr_config = CEDAR_GB_ADDR_CONFIG_GOLDEN; in evergreen_gpu_init()
3267 gb_addr_config = CEDAR_GB_ADDR_CONFIG_GOLDEN; in evergreen_gpu_init()
3295 gb_addr_config = SUMO_GB_ADDR_CONFIG_GOLDEN; in evergreen_gpu_init()
3317 gb_addr_config = SUMO2_GB_ADDR_CONFIG_GOLDEN; in evergreen_gpu_init()
3339 gb_addr_config = BARTS_GB_ADDR_CONFIG_GOLDEN; in evergreen_gpu_init()
3361 gb_addr_config = TURKS_GB_ADDR_CONFIG_GOLDEN; in evergreen_gpu_init()
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Dsi.c3090 u32 gb_addr_config = 0; in si_gpu_init() local
3113 gb_addr_config = TAHITI_GB_ADDR_CONFIG_GOLDEN; in si_gpu_init()
3130 gb_addr_config = TAHITI_GB_ADDR_CONFIG_GOLDEN; in si_gpu_init()
3148 gb_addr_config = VERDE_GB_ADDR_CONFIG_GOLDEN; in si_gpu_init()
3165 gb_addr_config = VERDE_GB_ADDR_CONFIG_GOLDEN; in si_gpu_init()
3182 gb_addr_config = HAINAN_GB_ADDR_CONFIG_GOLDEN; in si_gpu_init()
3218 gb_addr_config &= ~ROW_SIZE_MASK; in si_gpu_init()
3222 gb_addr_config |= ROW_SIZE(0); in si_gpu_init()
3225 gb_addr_config |= ROW_SIZE(1); in si_gpu_init()
3228 gb_addr_config |= ROW_SIZE(2); in si_gpu_init()
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Dcik.c3170 u32 gb_addr_config = RREG32(GB_ADDR_CONFIG); in cik_gpu_init() local
3192 gb_addr_config = BONAIRE_GB_ADDR_CONFIG_GOLDEN; in cik_gpu_init()
3209 gb_addr_config = HAWAII_GB_ADDR_CONFIG_GOLDEN; in cik_gpu_init()
3226 gb_addr_config = BONAIRE_GB_ADDR_CONFIG_GOLDEN; in cik_gpu_init()
3245 gb_addr_config = BONAIRE_GB_ADDR_CONFIG_GOLDEN; in cik_gpu_init()
3279 gb_addr_config &= ~ROW_SIZE_MASK; in cik_gpu_init()
3283 gb_addr_config |= ROW_SIZE(0); in cik_gpu_init()
3286 gb_addr_config |= ROW_SIZE(1); in cik_gpu_init()
3289 gb_addr_config |= ROW_SIZE(2); in cik_gpu_init()
3320 ((gb_addr_config & PIPE_INTERLEAVE_SIZE_MASK) >> PIPE_INTERLEAVE_SIZE_SHIFT) << 8; in cik_gpu_init()
[all …]
/linux-6.1.9/drivers/gpu/drm/amd/include/
Dkgd_kfd_interface.h164 uint32_t gb_addr_config; member
/linux-6.1.9/drivers/gpu/drm/amd/display/amdgpu_dm/
Damdgpu_dm_plane.c573 u32 gb_addr_config; in add_gfx11_modifiers() local
583 gb_addr_config = RREG32_SOC15(GC, 0, regGB_ADDR_CONFIG); in add_gfx11_modifiers()
584 ASSERT(gb_addr_config != 0); in add_gfx11_modifiers()
586 num_pkrs = 1 << REG_GET_FIELD(gb_addr_config, GB_ADDR_CONFIG, NUM_PKRS); in add_gfx11_modifiers()
588 num_pipes = 1 << REG_GET_FIELD(gb_addr_config, GB_ADDR_CONFIG, NUM_PIPES); in add_gfx11_modifiers()
/linux-6.1.9/include/uapi/linux/
Dkfd_ioctl.h337 __u32 gb_addr_config; /* from KFD */ member

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