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Searched refs:freq_in (Results 1 – 25 of 74) sorted by relevance

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/linux-6.1.9/sound/soc/codecs/
Dadau-utils.c15 int adau_calc_pll_cfg(unsigned int freq_in, unsigned int freq_out, in adau_calc_pll_cfg() argument
27 if (freq_out % freq_in != 0) { in adau_calc_pll_cfg()
28 div = DIV_ROUND_UP(freq_in, 13500000); in adau_calc_pll_cfg()
29 freq_in /= div; in adau_calc_pll_cfg()
30 r = freq_out / freq_in; in adau_calc_pll_cfg()
31 i = freq_out % freq_in; in adau_calc_pll_cfg()
32 j = gcd(i, freq_in); in adau_calc_pll_cfg()
34 m = freq_in / j; in adau_calc_pll_cfg()
37 r = freq_out / freq_in; in adau_calc_pll_cfg()
Drl6231.c140 int rl6231_pll_calc(const unsigned int freq_in, in rl6231_pll_calc() argument
147 unsigned int red_t = abs(freq_out - freq_in); in rl6231_pll_calc()
151 if (RL6231_PLL_INP_MAX < freq_in || RL6231_PLL_INP_MIN > freq_in) in rl6231_pll_calc()
155 if (freq_in == pll_preset_table[i].pll_in && in rl6231_pll_calc()
173 div_t = gcd(freq_in, freq_out); in rl6231_pll_calc()
175 div = find_best_div(freq_in, f_max, div_t); in rl6231_pll_calc()
176 f_in = freq_in / div; in rl6231_pll_calc()
Dwm8960.c53 unsigned int freq_in, unsigned int freq_out);
136 int freq_in; member
689 int wm8960_configure_pll(struct snd_soc_component *component, int freq_in, in wm8960_configure_pll() argument
699 closest = freq_in; in wm8960_configure_pll()
718 if (!is_pll_freq_available(freq_in, freq_out)) in wm8960_configure_pll()
744 int freq_out, freq_in; in wm8960_configure_clocking() local
762 if (wm8960->clk_id != WM8960_SYSCLK_MCLK && !wm8960->freq_in) { in wm8960_configure_clocking()
767 freq_in = wm8960->freq_in; in wm8960_configure_clocking()
777 freq_out = freq_in; in wm8960_configure_clocking()
795 freq_out = wm8960_configure_pll(component, freq_in, &i, &j, &k); in wm8960_configure_clocking()
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Dwm8995.c1724 int freq_in, int freq_out) in wm8995_get_fll_config() argument
1729 pr_debug("FLL input=%dHz, output=%dHz\n", freq_in, freq_out); in wm8995_get_fll_config()
1733 while (freq_in > 13500000) { in wm8995_get_fll_config()
1735 freq_in /= 2; in wm8995_get_fll_config()
1740 pr_debug("CLK_REF_DIV=%d, Fref=%dHz\n", fll->clk_ref_div, freq_in); in wm8995_get_fll_config()
1752 if (freq_in > 1000000) { in wm8995_get_fll_config()
1754 } else if (freq_in > 256000) { in wm8995_get_fll_config()
1756 freq_in *= 2; in wm8995_get_fll_config()
1757 } else if (freq_in > 128000) { in wm8995_get_fll_config()
1759 freq_in *= 4; in wm8995_get_fll_config()
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Drt1019.c326 unsigned int freq_in, unsigned int freq_out) in rt1019_set_dai_pll() argument
333 if (!freq_in || !freq_out) { in rt1019_set_dai_pll()
340 if (source == rt1019->pll_src && freq_in == rt1019->pll_in && in rt1019_set_dai_pll()
360 ret = rl6231_pll_calc(freq_in, freq_out, &pll_code); in rt1019_set_dai_pll()
362 dev_err(component->dev, "Unsupported input clock %d\n", freq_in); in rt1019_set_dai_pll()
383 rt1019->pll_in = freq_in; in rt1019_set_dai_pll()
Drt1308.c618 int pll_id, int source, unsigned int freq_in, in rt1308_set_component_pll() argument
625 if (source == rt1308->pll_src && freq_in == rt1308->pll_in && in rt1308_set_component_pll()
629 if (!freq_in || !freq_out) { in rt1308_set_component_pll()
658 freq_in = 25000000; in rt1308_set_component_pll()
665 ret = rl6231_pll_calc(freq_in, freq_out, &pll_code); in rt1308_set_component_pll()
667 dev_err(component->dev, "Unsupported input clock %d\n", freq_in); in rt1308_set_component_pll()
681 rt1308->pll_in = freq_in; in rt1308_set_component_pll()
Dak4375.c255 unsigned int freq_in, freq_out; in ak4375_hw_params() local
264 freq_in = 32 * ak4375->rate / (ak4375->pld + 1); in ak4375_hw_params()
271 return snd_soc_dai_set_pll(dai, 0, 0, freq_in, freq_out); in ak4375_hw_params()
275 unsigned int freq_in, unsigned int freq_out) in ak4375_dai_set_pll() argument
350 plm = freq_out / freq_in - 1; in ak4375_dai_set_pll()
362 ak4375->rate, mclk, freq_in, freq_out, ak4375->pld, plm, mdiv, div); in ak4375_dai_set_pll()
Drt1016.c455 int pll_id, int source, unsigned int freq_in, in rt1016_set_component_pll() argument
462 if (!freq_in || !freq_out) { in rt1016_set_component_pll()
471 if (source == rt1016->pll_src && freq_in == rt1016->pll_in && in rt1016_set_component_pll()
491 ret = rl6231_pll_calc(freq_in, freq_out * 4, &pll_code); in rt1016_set_component_pll()
493 dev_err(component->dev, "Unsupported input clock %d\n", freq_in); in rt1016_set_component_pll()
510 rt1016->pll_in = freq_in; in rt1016_set_component_pll()
Dwm8900.c746 int fll_id, unsigned int freq_in, unsigned int freq_out) in wm8900_set_fll() argument
751 if (wm8900->fll_in == freq_in && wm8900->fll_out == freq_out) in wm8900_set_fll()
759 if (!freq_in || !freq_out) { in wm8900_set_fll()
764 wm8900->fll_in = freq_in; in wm8900_set_fll()
770 if (fll_factors(&fll_div, freq_in, freq_out) != 0) in wm8900_set_fll()
773 wm8900->fll_in = freq_in; in wm8900_set_fll()
810 int source, unsigned int freq_in, unsigned int freq_out) in wm8900_set_dai_pll() argument
812 return wm8900_set_fll(codec_dai->component, pll_id, freq_in, freq_out); in wm8900_set_dai_pll()
Dnau8822.c722 unsigned int freq_in, unsigned int freq_out) in nau8822_set_pll() argument
729 if (freq_in == pll_param->freq_in && in nau8822_set_pll()
742 ret = nau8822_calc_pll(freq_in, fs, pll_param); in nau8822_set_pll()
745 freq_in); in nau8822_set_pll()
776 pll_param->freq_in = freq_in; in nau8822_set_pll()
Dwm8994.c2123 int freq_in, int freq_out) in wm8994_get_fll_config() argument
2128 pr_debug("FLL input=%dHz, output=%dHz\n", freq_in, freq_out); in wm8994_get_fll_config()
2132 while (freq_in > 13500000) { in wm8994_get_fll_config()
2134 freq_in /= 2; in wm8994_get_fll_config()
2139 pr_debug("CLK_REF_DIV=%d, Fref=%dHz\n", fll->clk_ref_div, freq_in); in wm8994_get_fll_config()
2151 if (freq_in > 1000000) { in wm8994_get_fll_config()
2153 } else if (freq_in > 256000) { in wm8994_get_fll_config()
2155 freq_in *= 2; in wm8994_get_fll_config()
2156 } else if (freq_in > 128000) { in wm8994_get_fll_config()
2158 freq_in *= 4; in wm8994_get_fll_config()
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Dadau-utils.h5 int adau_calc_pll_cfg(unsigned int freq_in, unsigned int freq_out,
Drt1015.c829 int pll_id, int source, unsigned int freq_in, in rt1015_set_component_pll() argument
836 if (!freq_in || !freq_out) { in rt1015_set_component_pll()
845 if (source == rt1015->pll_src && freq_in == rt1015->pll_in && in rt1015_set_component_pll()
865 ret = rl6231_pll_calc(freq_in, freq_out, &pll_code); in rt1015_set_component_pll()
867 dev_err(component->dev, "Unsupported input clock %d\n", freq_in); in rt1015_set_component_pll()
882 rt1015->pll_in = freq_in; in rt1015_set_component_pll()
Drt1305.c793 int pll_id, int source, unsigned int freq_in, in rt1305_set_component_pll() argument
800 if (source == rt1305->pll_src && freq_in == rt1305->pll_in && in rt1305_set_component_pll()
804 if (!freq_in || !freq_out) { in rt1305_set_component_pll()
835 freq_in = 98304000; in rt1305_set_component_pll()
842 ret = rl6231_pll_calc(freq_in, freq_out, &pll_code); in rt1305_set_component_pll()
844 dev_err(component->dev, "Unsupported input clock %d\n", freq_in); in rt1305_set_component_pll()
859 rt1305->pll_in = freq_in; in rt1305_set_component_pll()
Drl6231.h28 int rl6231_pll_calc(const unsigned int freq_in,
Dalc5632.c678 int source, unsigned int freq_in, unsigned int freq_out) in alc5632_set_dai_pll() argument
701 if (!freq_in || !freq_out) in alc5632_set_dai_pll()
707 if (codec_master_pll_div[i].pll_in == freq_in in alc5632_set_dai_pll()
717 if (codec_slave_pll_div[i].pll_in == freq_in in alc5632_set_dai_pll()
728 if (codec_slave_pll_div[i].pll_in == freq_in in alc5632_set_dai_pll()
Dwm9713.c815 int pll_id, unsigned int freq_in, unsigned int freq_out) in wm9713_set_pll() argument
822 if (freq_in == 0) { in wm9713_set_pll()
830 pll_factors(component, &pll_div, freq_in); in wm9713_set_pll()
868 wm9713->pll_in = freq_in; in wm9713_set_pll()
876 int source, unsigned int freq_in, unsigned int freq_out) in wm9713_set_dai_pll() argument
879 return wm9713_set_pll(component, pll_id, freq_in, freq_out); in wm9713_set_dai_pll()
Drt5660.c1010 unsigned int freq_in, unsigned int freq_out) in rt5660_set_dai_pll() argument
1017 if (source == rt5660->pll_src && freq_in == rt5660->pll_in && in rt5660_set_dai_pll()
1021 if (!freq_in || !freq_out) { in rt5660_set_dai_pll()
1047 ret = rl6231_pll_calc(freq_in, freq_out, &pll_code); in rt5660_set_dai_pll()
1049 dev_err(component->dev, "Unsupported input clock %d\n", freq_in); in rt5660_set_dai_pll()
1063 rt5660->pll_in = freq_in; in rt5660_set_dai_pll()
Dwm8580.c461 int source, unsigned int freq_in, unsigned int freq_out) in wm8580_set_dai_pll() argument
492 if (freq_in && freq_out) { in wm8580_set_dai_pll()
493 ret = pll_factors(&pll_div, freq_out, freq_in); in wm8580_set_dai_pll()
498 state->in = freq_in; in wm8580_set_dai_pll()
506 if (!freq_in || !freq_out) in wm8580_set_dai_pll()
Dwm8510.c314 int source, unsigned int freq_in, unsigned int freq_out) in wm8510_set_dai_pll() argument
319 if (freq_in == 0 || freq_out == 0) { in wm8510_set_dai_pll()
330 pll_factors(freq_out*4, freq_in); in wm8510_set_dai_pll()
Drt5514.c898 unsigned int freq_in, unsigned int freq_out) in rt5514_set_dai_pll() argument
905 if (!freq_in || !freq_out) { in rt5514_set_dai_pll()
917 if (source == rt5514->pll_src && freq_in == rt5514->pll_in && in rt5514_set_dai_pll()
937 ret = rl6231_pll_calc(freq_in, freq_out, &pll_code); in rt5514_set_dai_pll()
939 dev_err(component->dev, "Unsupported input clock %d\n", freq_in); in rt5514_set_dai_pll()
954 rt5514->pll_in = freq_in; in rt5514_set_dai_pll()
Drt5616.c1095 unsigned int freq_in, unsigned int freq_out) in rt5616_set_dai_pll() argument
1102 if (source == rt5616->pll_src && freq_in == rt5616->pll_in && in rt5616_set_dai_pll()
1106 if (!freq_in || !freq_out) { in rt5616_set_dai_pll()
1134 ret = rl6231_pll_calc(freq_in, freq_out, &pll_code); in rt5616_set_dai_pll()
1136 dev_err(component->dev, "Unsupported input clock %d\n", freq_in); in rt5616_set_dai_pll()
1151 rt5616->pll_in = freq_in; in rt5616_set_dai_pll()
Drt5682s.c2298 if (plla_table[i].freq_in == f_in && plla_table[i].freq_out == f_out) { in find_pll_inter_combination()
2306 if (pllb_table[i].freq_in == f_in && pllb_table[i].freq_out == f_out) { in find_pll_inter_combination()
2314 if (plla_table[i].freq_in == f_in && plla_table[i].freq_out == 3840000) { in find_pll_inter_combination()
2316 if (pllb_table[j].freq_in == 3840000 && in find_pll_inter_combination()
2330 int pll_id, int source, unsigned int freq_in, in rt5682s_set_component_pll() argument
2336 if (source == rt5682s->pll_src[pll_id] && freq_in == rt5682s->pll_in[pll_id] && in rt5682s_set_component_pll()
2340 if (!freq_in || !freq_out) { in rt5682s_set_component_pll()
2363 rt5682s->pll_comb = find_pll_inter_combination(freq_in, freq_out, in rt5682s_set_component_pll()
2371 pll_id + 1, freq_in, freq_out, rt5682s->pll_comb); in rt5682s_set_component_pll()
2375 pll_id + 1, freq_in, freq_out, rt5682s->pll_comb); in rt5682s_set_component_pll()
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Dadau1373.c1253 int source, unsigned int freq_in, unsigned int freq_out) in adau1373_set_pll() argument
1286 if (freq_in < 7813 || freq_in > 27000000) in adau1373_set_pll()
1294 while (freq_in < 8000000) { in adau1373_set_pll()
1295 freq_in *= 2; in adau1373_set_pll()
1299 ret = adau_calc_pll_cfg(freq_in, freq_out, pll_regs); in adau1373_set_pll()
/linux-6.1.9/drivers/mfd/
Dtwl6040.c372 unsigned int freq_in, unsigned int freq_out) in twl6040_set_pll() argument
415 switch (freq_in) { in twl6040_set_pll()
430 "freq_in %d not supported\n", freq_in); in twl6040_set_pll()
446 if (twl6040->mclk_rate != freq_in) { in twl6040_set_pll()
449 switch (freq_in) { in twl6040_set_pll()
472 "freq_in %d not supported\n", freq_in); in twl6040_set_pll()
496 twl6040->mclk_rate = freq_in; in twl6040_set_pll()

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