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Searched refs:fixed20_12 (Results 1 – 19 of 19) sorted by relevance

/linux-6.1.9/include/drm/
Ddrm_fixed.h32 } fixed20_12; typedef
45 static inline u32 dfixed_floor(fixed20_12 A) in dfixed_floor()
52 static inline u32 dfixed_ceil(fixed20_12 A) in dfixed_ceil()
62 static inline u32 dfixed_div(fixed20_12 A, fixed20_12 B) in dfixed_div()
/linux-6.1.9/drivers/gpu/drm/radeon/
Drs690.c72 fixed20_12 tmp; in rs690_pm_info()
261 fixed20_12 num_line_pair;
262 fixed20_12 estimated_width;
263 fixed20_12 worst_case_latency;
264 fixed20_12 consumption_rate;
265 fixed20_12 active_time;
266 fixed20_12 dbpp;
267 fixed20_12 priority_mark_max;
268 fixed20_12 priority_mark;
269 fixed20_12 sclk;
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Drv515.c912 fixed20_12 num_line_pair;
913 fixed20_12 estimated_width;
914 fixed20_12 worst_case_latency;
915 fixed20_12 consumption_rate;
916 fixed20_12 active_time;
917 fixed20_12 dbpp;
918 fixed20_12 priority_mark_max;
919 fixed20_12 priority_mark;
920 fixed20_12 sclk;
929 fixed20_12 a, b, c; in rv515_crtc_bandwidth_compute()
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Devergreen.c1942 fixed20_12 vsc; /* vertical scale ratio */
1952 fixed20_12 dram_efficiency; /* 0.7 */ in evergreen_dram_bandwidth()
1953 fixed20_12 yclk, dram_channels, bandwidth; in evergreen_dram_bandwidth()
1954 fixed20_12 a; in evergreen_dram_bandwidth()
1972 fixed20_12 disp_dram_allocation; /* 0.3 to 0.7 */ in evergreen_dram_bandwidth_for_display()
1973 fixed20_12 yclk, dram_channels, bandwidth; in evergreen_dram_bandwidth_for_display()
1974 fixed20_12 a; in evergreen_dram_bandwidth_for_display()
1992 fixed20_12 return_efficiency; /* 0.8 */ in evergreen_data_return_bandwidth()
1993 fixed20_12 sclk, bandwidth; in evergreen_data_return_bandwidth()
1994 fixed20_12 a; in evergreen_data_return_bandwidth()
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Dradeon.h1632 fixed20_12 max_bandwidth;
1633 fixed20_12 igp_sideport_mclk;
1634 fixed20_12 igp_system_mclk;
1635 fixed20_12 igp_ht_link_clk;
1636 fixed20_12 igp_ht_link_width;
1637 fixed20_12 k8_bandwidth;
1638 fixed20_12 sideport_bandwidth;
1639 fixed20_12 ht_bandwidth;
1640 fixed20_12 core_bandwidth;
1641 fixed20_12 sclk;
[all …]
Dr100.c3146 fixed20_12 trcd_ff, trp_ff, tras_ff, trbs_ff, tcas_ff; in r100_bandwidth_update()
3147 fixed20_12 sclk_ff, mclk_ff, sclk_eff_ff, sclk_delay_ff; in r100_bandwidth_update()
3148 fixed20_12 peak_disp_bw, mem_bw, pix_clk, pix_clk2, temp_ff; in r100_bandwidth_update()
3149 fixed20_12 crit_point_ff = {0}; in r100_bandwidth_update()
3151 fixed20_12 memtcas_ff[8] = { in r100_bandwidth_update()
3160 fixed20_12 memtcas_rs480_ff[8] = { in r100_bandwidth_update()
3170 fixed20_12 memtcas2_ff[8] = { in r100_bandwidth_update()
3180 fixed20_12 memtrbs[8] = { in r100_bandwidth_update()
3190 fixed20_12 memtrbs_r4xx[8] = { in r100_bandwidth_update()
3200 fixed20_12 min_mem_eff; in r100_bandwidth_update()
[all …]
Dsi.c2061 fixed20_12 vsc; /* vertical scale ratio */
2071 fixed20_12 dram_efficiency; /* 0.7 */ in dce6_dram_bandwidth()
2072 fixed20_12 yclk, dram_channels, bandwidth; in dce6_dram_bandwidth()
2073 fixed20_12 a; in dce6_dram_bandwidth()
2091 fixed20_12 disp_dram_allocation; /* 0.3 to 0.7 */ in dce6_dram_bandwidth_for_display()
2092 fixed20_12 yclk, dram_channels, bandwidth; in dce6_dram_bandwidth_for_display()
2093 fixed20_12 a; in dce6_dram_bandwidth_for_display()
2111 fixed20_12 return_efficiency; /* 0.8 */ in dce6_data_return_bandwidth()
2112 fixed20_12 sclk, bandwidth; in dce6_data_return_bandwidth()
2113 fixed20_12 a; in dce6_data_return_bandwidth()
[all …]
Dcik.c8907 fixed20_12 vsc; /* vertical scale ratio */
8926 fixed20_12 dram_efficiency; /* 0.7 */ in dce8_dram_bandwidth()
8927 fixed20_12 yclk, dram_channels, bandwidth; in dce8_dram_bandwidth()
8928 fixed20_12 a; in dce8_dram_bandwidth()
8955 fixed20_12 disp_dram_allocation; /* 0.3 to 0.7 */ in dce8_dram_bandwidth_for_display()
8956 fixed20_12 yclk, dram_channels, bandwidth; in dce8_dram_bandwidth_for_display()
8957 fixed20_12 a; in dce8_dram_bandwidth_for_display()
8984 fixed20_12 return_efficiency; /* 0.8 */ in dce8_data_return_bandwidth()
8985 fixed20_12 sclk, bandwidth; in dce8_data_return_bandwidth()
8986 fixed20_12 a; in dce8_data_return_bandwidth()
[all …]
Dradeon_mode.h343 fixed20_12 vsc;
344 fixed20_12 hsc;
Dradeon_device.c726 fixed20_12 a; in radeon_update_bandwidth_info()
Dradeon_display.c1762 fixed20_12 a, b; in radeon_crtc_scaling_mode_fixup()
/linux-6.1.9/drivers/gpu/drm/amd/amdgpu/
Ddce_v6_0.c503 fixed20_12 vsc; /* vertical scale ratio */
522 fixed20_12 dram_efficiency; /* 0.7 */ in dce_v6_0_dram_bandwidth()
523 fixed20_12 yclk, dram_channels, bandwidth; in dce_v6_0_dram_bandwidth()
524 fixed20_12 a; in dce_v6_0_dram_bandwidth()
551 fixed20_12 disp_dram_allocation; /* 0.3 to 0.7 */ in dce_v6_0_dram_bandwidth_for_display()
552 fixed20_12 yclk, dram_channels, bandwidth; in dce_v6_0_dram_bandwidth_for_display()
553 fixed20_12 a; in dce_v6_0_dram_bandwidth_for_display()
580 fixed20_12 return_efficiency; /* 0.8 */ in dce_v6_0_data_return_bandwidth()
581 fixed20_12 sclk, bandwidth; in dce_v6_0_data_return_bandwidth()
582 fixed20_12 a; in dce_v6_0_data_return_bandwidth()
[all …]
Ddce_v8_0.c640 fixed20_12 vsc; /* vertical scale ratio */
659 fixed20_12 dram_efficiency; /* 0.7 */ in dce_v8_0_dram_bandwidth()
660 fixed20_12 yclk, dram_channels, bandwidth; in dce_v8_0_dram_bandwidth()
661 fixed20_12 a; in dce_v8_0_dram_bandwidth()
688 fixed20_12 disp_dram_allocation; /* 0.3 to 0.7 */ in dce_v8_0_dram_bandwidth_for_display()
689 fixed20_12 yclk, dram_channels, bandwidth; in dce_v8_0_dram_bandwidth_for_display()
690 fixed20_12 a; in dce_v8_0_dram_bandwidth_for_display()
717 fixed20_12 return_efficiency; /* 0.8 */ in dce_v8_0_data_return_bandwidth()
718 fixed20_12 sclk, bandwidth; in dce_v8_0_data_return_bandwidth()
719 fixed20_12 a; in dce_v8_0_data_return_bandwidth()
[all …]
Ddce_v10_0.c705 fixed20_12 vsc; /* vertical scale ratio */
724 fixed20_12 dram_efficiency; /* 0.7 */ in dce_v10_0_dram_bandwidth()
725 fixed20_12 yclk, dram_channels, bandwidth; in dce_v10_0_dram_bandwidth()
726 fixed20_12 a; in dce_v10_0_dram_bandwidth()
753 fixed20_12 disp_dram_allocation; /* 0.3 to 0.7 */ in dce_v10_0_dram_bandwidth_for_display()
754 fixed20_12 yclk, dram_channels, bandwidth; in dce_v10_0_dram_bandwidth_for_display()
755 fixed20_12 a; in dce_v10_0_dram_bandwidth_for_display()
782 fixed20_12 return_efficiency; /* 0.8 */ in dce_v10_0_data_return_bandwidth()
783 fixed20_12 sclk, bandwidth; in dce_v10_0_data_return_bandwidth()
784 fixed20_12 a; in dce_v10_0_data_return_bandwidth()
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Ddce_v11_0.c731 fixed20_12 vsc; /* vertical scale ratio */
750 fixed20_12 dram_efficiency; /* 0.7 */ in dce_v11_0_dram_bandwidth()
751 fixed20_12 yclk, dram_channels, bandwidth; in dce_v11_0_dram_bandwidth()
752 fixed20_12 a; in dce_v11_0_dram_bandwidth()
779 fixed20_12 disp_dram_allocation; /* 0.3 to 0.7 */ in dce_v11_0_dram_bandwidth_for_display()
780 fixed20_12 yclk, dram_channels, bandwidth; in dce_v11_0_dram_bandwidth_for_display()
781 fixed20_12 a; in dce_v11_0_dram_bandwidth_for_display()
808 fixed20_12 return_efficiency; /* 0.8 */ in dce_v11_0_data_return_bandwidth()
809 fixed20_12 sclk, bandwidth; in dce_v11_0_data_return_bandwidth()
810 fixed20_12 a; in dce_v11_0_data_return_bandwidth()
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Damdgpu_mode.h389 fixed20_12 vsc;
390 fixed20_12 hsc;
Damdgpu_display.c1377 fixed20_12 a, b; in amdgpu_display_crtc_scaling_mode_fixup()
/linux-6.1.9/drivers/gpu/drm/tegra/
Dhub.c522 static inline u32 compute_phase_incr(fixed20_12 in, unsigned int out) in compute_phase_incr()
605 fixed20_12 width = dfixed_init(new_state->src_w >> 16); in tegra_shared_plane_atomic_update()
616 fixed20_12 height = dfixed_init(new_state->src_h >> 16); in tegra_shared_plane_atomic_update()
Ddc.c129 fixed20_12 outf = dfixed_init(out); in compute_dda_inc()
130 fixed20_12 inf = dfixed_init(in); in compute_dda_inc()
162 fixed20_12 inf = dfixed_init(in); in compute_initial_dda()