/linux-6.1.9/drivers/clk/bcm/ |
D | clk-kona.h | 124 u32 en_bit; /* 0: disable; 1: enable */ member 155 .en_bit = (_en_bit), \ 167 .en_bit = (_en_bit), \ 178 .en_bit = (_en_bit), \ 189 .en_bit = (_en_bit), \ 205 u32 en_bit; /* bit used to enable hysteresis */ member 214 .en_bit = (_en_bit), \
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D | clk-kona-setup.c | 252 if (!bit_posn_valid(gate->en_bit, "gate enable", clock_name)) in gate_valid() 270 if (!bit_posn_valid(hyst->en_bit, "hysteresis enable", clock_name)) in hyst_valid()
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D | clk-kona.c | 416 mask = (u32)1 << gate->en_bit; in __gate_commit() 529 mask = (u32)1 << hyst->en_bit; in hyst_init()
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/linux-6.1.9/drivers/mfd/ |
D | rc5t583.c | 76 unsigned int en_bit; in __rc5t583_set_ext_pwrreq1_control() local 84 en_bit = deepsleep_data[id].ds_pos_bit; in __rc5t583_set_ext_pwrreq1_control() 85 slot_bit = en_bit + 1; in __rc5t583_set_ext_pwrreq1_control() 93 sleepseq_val &= ~(0xF << en_bit); in __rc5t583_set_ext_pwrreq1_control() 94 sleepseq_val |= BIT(en_bit); in __rc5t583_set_ext_pwrreq1_control()
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/linux-6.1.9/drivers/clk/qcom/ |
D | lcc-msm8960.c | 125 #define CLK_AIF_OSR_CLK(prefix, _ns, hr, en_bit) \ argument 132 .enable_mask = BIT(en_bit), \ 162 #define CLK_AIF_OSR_BIT_DIV_CLK(prefix, _ns, hr, en_bit) \ argument 169 .enable_mask = BIT(en_bit), \
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/linux-6.1.9/drivers/clk/ |
D | clk-vt8500.c | 25 int en_bit; member 84 en_val |= BIT(cdev->en_bit); in vt8500_dclk_enable() 100 en_val &= ~BIT(cdev->en_bit); in vt8500_dclk_disable() 109 u32 en_val = (readl(cdev->en_reg) & BIT(cdev->en_bit)); in vt8500_dclk_is_enabled() 246 rc = of_property_read_u32(node, "enable-bit", &dev_clk->en_bit); in vtwm_device_clk_init()
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/linux-6.1.9/drivers/regulator/ |
D | atc260x-regulator.c | 337 #define atc2609a_reg_desc_dcdc(num, en_bit) { \ argument 351 .enable_mask = BIT(en_bit), \ 356 #define atc2609a_reg_desc_dcdc_range(num, en_bit) { \ argument 370 .enable_mask = BIT(en_bit), \
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D | ltc3589.c | 208 #define LTC3589_REG(_name, _of_name, _ops, en_bit, dtv1_reg, dtv_mask) \ argument 222 .enable_reg = (en_bit) ? LTC3589_OVEN : 0, \ 223 .enable_mask = (en_bit), \
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D | ltc3676.c | 195 #define LTC3676_REG(_id, _name, _ops, en_reg, en_bit, dvba_reg, dvb_mask) \ argument 213 .enable_mask = (1 << en_bit), \
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/linux-6.1.9/drivers/gpu/drm/ingenic/ |
D | ingenic-drm-drv.c | 526 unsigned int en_bit; in ingenic_drm_plane_enable() local 530 en_bit = JZ_LCD_OSDC_F1EN; in ingenic_drm_plane_enable() 532 en_bit = JZ_LCD_OSDC_F0EN; in ingenic_drm_plane_enable() 534 regmap_set_bits(priv->map, JZ_REG_LCD_OSDC, en_bit); in ingenic_drm_plane_enable() 541 unsigned int en_bit; in ingenic_drm_plane_disable() local 545 en_bit = JZ_LCD_OSDC_F1EN; in ingenic_drm_plane_disable() 547 en_bit = JZ_LCD_OSDC_F0EN; in ingenic_drm_plane_disable() 549 regmap_clear_bits(priv->map, JZ_REG_LCD_OSDC, en_bit); in ingenic_drm_plane_disable()
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