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Searched refs:e2e_pipe_param (Results 1 – 17 of 17) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn32/
Ddisplay_rq_dlg_calc_32.c45 const display_e2e_pipe_params_st *e2e_pipe_param, in dml32_rq_dlg_get_rq_reg() argument
49 const display_pipe_source_params_st *src = &e2e_pipe_param[pipe_idx].pipe.src; in dml32_rq_dlg_get_rq_reg()
76 …pixel_chunk_bytes = get_pixel_chunk_size_in_kbyte(mode_lib, e2e_pipe_param, num_pipes) * 1024; // … in dml32_rq_dlg_get_rq_reg()
77 …min_pixel_chunk_bytes = get_min_pixel_chunk_size_in_byte(mode_lib, e2e_pipe_param, num_pipes); // … in dml32_rq_dlg_get_rq_reg()
82 …meta_chunk_bytes = get_meta_chunk_size_in_kbyte(mode_lib, e2e_pipe_param, num_pipes) * 1024; // Fr… in dml32_rq_dlg_get_rq_reg()
83 …min_meta_chunk_bytes = get_min_meta_chunk_size_in_byte(mode_lib, e2e_pipe_param, num_pipes); // Fr… in dml32_rq_dlg_get_rq_reg()
85 …dpte_group_bytes = get_dpte_group_size_in_bytes(mode_lib, e2e_pipe_param, num_pipes, pipe_idx); //… in dml32_rq_dlg_get_rq_reg()
86 …mpte_group_bytes = get_vm_group_size_in_bytes(mode_lib, e2e_pipe_param, num_pipes, pipe_idx); // F… in dml32_rq_dlg_get_rq_reg()
96 …p1_pixel_chunk_bytes = get_alpha_pixel_chunk_size_in_kbyte(mode_lib, e2e_pipe_param, num_pipes) * … in dml32_rq_dlg_get_rq_reg()
129 …detile_buf_size_in_bytes = get_det_buffer_size_kbytes(mode_lib, e2e_pipe_param, num_pipes, pipe_id… in dml32_rq_dlg_get_rq_reg()
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Ddisplay_rq_dlg_calc_32.h46 const display_e2e_pipe_params_st *e2e_pipe_param,
66 display_e2e_pipe_params_st *e2e_pipe_param,
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn314/
Ddisplay_rq_dlg_calc_314.c939 const display_e2e_pipe_params_st *e2e_pipe_param, in dml_rq_dlg_get_dlg_params() argument
952 const display_pipe_source_params_st *src = &e2e_pipe_param[pipe_idx].pipe.src; in dml_rq_dlg_get_dlg_params()
953 const display_pipe_dest_params_st *dst = &e2e_pipe_param[pipe_idx].pipe.dest; in dml_rq_dlg_get_dlg_params()
954 const display_output_params_st *dout = &e2e_pipe_param[pipe_idx].dout; in dml_rq_dlg_get_dlg_params()
955 const display_clocks_and_cfg_st *clks = &e2e_pipe_param[pipe_idx].clks_cfg; in dml_rq_dlg_get_dlg_params()
956 const scaler_ratio_depth_st *scl = &e2e_pipe_param[pipe_idx].pipe.scale_ratio_depth; in dml_rq_dlg_get_dlg_params()
957 const scaler_taps_st *taps = &e2e_pipe_param[pipe_idx].pipe.scale_taps; in dml_rq_dlg_get_dlg_params()
1048 …unsigned int vba__min_dst_y_next_start = get_min_dst_y_next_start(mode_lib, e2e_pipe_param, num_pi… in dml_rq_dlg_get_dlg_params()
1049 …unsigned int vba__vready_after_vcount0 = get_vready_at_or_after_vsync(mode_lib, e2e_pipe_param, nu… in dml_rq_dlg_get_dlg_params()
1051 …_delivery_pre_l = get_refcyc_per_line_delivery_pre_l_in_us(mode_lib, e2e_pipe_param, num_pipes, pi… in dml_rq_dlg_get_dlg_params()
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Ddisplay_rq_dlg_calc_314.h61 const display_e2e_pipe_params_st *e2e_pipe_param,
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn31/
Ddisplay_rq_dlg_calc_31.c854 const display_e2e_pipe_params_st *e2e_pipe_param, in dml_rq_dlg_get_dlg_params() argument
867 const display_pipe_source_params_st *src = &e2e_pipe_param[pipe_idx].pipe.src; in dml_rq_dlg_get_dlg_params()
868 const display_pipe_dest_params_st *dst = &e2e_pipe_param[pipe_idx].pipe.dest; in dml_rq_dlg_get_dlg_params()
869 const display_clocks_and_cfg_st *clks = &e2e_pipe_param[pipe_idx].clks_cfg; in dml_rq_dlg_get_dlg_params()
870 const scaler_ratio_depth_st *scl = &e2e_pipe_param[pipe_idx].pipe.scale_ratio_depth; in dml_rq_dlg_get_dlg_params()
871 const scaler_taps_st *taps = &e2e_pipe_param[pipe_idx].pipe.scale_taps; in dml_rq_dlg_get_dlg_params()
959 …int unsigned vba__min_dst_y_next_start = get_min_dst_y_next_start(mode_lib, e2e_pipe_param, num_pi… in dml_rq_dlg_get_dlg_params()
960 …int unsigned vba__vready_after_vcount0 = get_vready_at_or_after_vsync(mode_lib, e2e_pipe_param, nu… in dml_rq_dlg_get_dlg_params()
962 …_delivery_pre_l = get_refcyc_per_line_delivery_pre_l_in_us(mode_lib, e2e_pipe_param, num_pipes, pi… in dml_rq_dlg_get_dlg_params()
963 …per_line_delivery_l = get_refcyc_per_line_delivery_l_in_us(mode_lib, e2e_pipe_param, num_pipes, pi… in dml_rq_dlg_get_dlg_params()
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Ddisplay_rq_dlg_calc_31.h60 const display_e2e_pipe_params_st *e2e_pipe_param,
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/
Ddml1_display_rq_dlg_calc.c1003 const struct _vcs_dpi_display_e2e_pipe_params_st *e2e_pipe_param, in dml1_rq_dlg_get_dlg_params() argument
1010 unsigned int htotal = e2e_pipe_param->pipe.dest.htotal; in dml1_rq_dlg_get_dlg_params()
1011 unsigned int hblank_end = e2e_pipe_param->pipe.dest.hblank_end; in dml1_rq_dlg_get_dlg_params()
1012 unsigned int vblank_start = e2e_pipe_param->pipe.dest.vblank_start; in dml1_rq_dlg_get_dlg_params()
1013 unsigned int vblank_end = e2e_pipe_param->pipe.dest.vblank_end; in dml1_rq_dlg_get_dlg_params()
1014 bool interlaced = e2e_pipe_param->pipe.dest.interlaced; in dml1_rq_dlg_get_dlg_params()
1017 double pclk_freq_in_mhz = e2e_pipe_param->pipe.dest.pixel_rate_mhz; in dml1_rq_dlg_get_dlg_params()
1018 double refclk_freq_in_mhz = e2e_pipe_param->clks_cfg.refclk_mhz; in dml1_rq_dlg_get_dlg_params()
1019 double dppclk_freq_in_mhz = e2e_pipe_param->clks_cfg.dppclk_mhz; in dml1_rq_dlg_get_dlg_params()
1020 double dispclk_freq_in_mhz = e2e_pipe_param->clks_cfg.dispclk_mhz; in dml1_rq_dlg_get_dlg_params()
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Ddisplay_mode_lib.h56 const display_e2e_pipe_params_st *e2e_pipe_param,
74 display_e2e_pipe_params_st *e2e_pipe_param,
79 const display_e2e_pipe_params_st *e2e_pipe_param,
Ddml1_display_rq_dlg_calc.h60 const struct _vcs_dpi_display_e2e_pipe_params_st *e2e_pipe_param,
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn30/
Ddisplay_rq_dlg_calc_30.c893 const display_e2e_pipe_params_st *e2e_pipe_param, in dml_rq_dlg_get_dlg_params() argument
906 const display_pipe_source_params_st *src = &e2e_pipe_param[pipe_idx].pipe.src; in dml_rq_dlg_get_dlg_params()
907 const display_pipe_dest_params_st *dst = &e2e_pipe_param[pipe_idx].pipe.dest; in dml_rq_dlg_get_dlg_params()
908 const display_output_params_st *dout = &e2e_pipe_param[pipe_idx].dout; in dml_rq_dlg_get_dlg_params()
909 const display_clocks_and_cfg_st *clks = &e2e_pipe_param[pipe_idx].clks_cfg; in dml_rq_dlg_get_dlg_params()
910 const scaler_ratio_depth_st *scl = &e2e_pipe_param[pipe_idx].pipe.scale_ratio_depth; in dml_rq_dlg_get_dlg_params()
911 const scaler_taps_st *taps = &e2e_pipe_param[pipe_idx].pipe.scale_taps; in dml_rq_dlg_get_dlg_params()
1052 t_calc_us = get_tcalc(mode_lib, e2e_pipe_param, num_pipes); in dml_rq_dlg_get_dlg_params()
1053 min_ttu_vblank = get_min_ttu_vblank(mode_lib, e2e_pipe_param, num_pipes, pipe_idx); in dml_rq_dlg_get_dlg_params()
1128 double dsc_delay = get_dsc_delay(mode_lib, e2e_pipe_param, num_pipes, pipe_idx); in dml_rq_dlg_get_dlg_params()
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Ddisplay_rq_dlg_calc_30.h60 const display_e2e_pipe_params_st *e2e_pipe_param,
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn20/
Ddisplay_rq_dlg_calc_20.c47 const display_e2e_pipe_params_st *e2e_pipe_param,
785 const display_e2e_pipe_params_st *e2e_pipe_param, in dml20_rq_dlg_get_dlg_params() argument
795 const display_pipe_source_params_st *src = &e2e_pipe_param[pipe_idx].pipe.src; in dml20_rq_dlg_get_dlg_params()
796 const display_pipe_dest_params_st *dst = &e2e_pipe_param[pipe_idx].pipe.dest; in dml20_rq_dlg_get_dlg_params()
797 const display_output_params_st *dout = &e2e_pipe_param[pipe_idx].dout; in dml20_rq_dlg_get_dlg_params()
798 const display_clocks_and_cfg_st *clks = &e2e_pipe_param[pipe_idx].clks_cfg; in dml20_rq_dlg_get_dlg_params()
799 const scaler_ratio_depth_st *scl = &e2e_pipe_param[pipe_idx].pipe.scale_ratio_depth; in dml20_rq_dlg_get_dlg_params()
800 const scaler_taps_st *taps = &e2e_pipe_param[pipe_idx].pipe.scale_taps; in dml20_rq_dlg_get_dlg_params()
939 t_calc_us = get_tcalc(mode_lib, e2e_pipe_param, num_pipes); in dml20_rq_dlg_get_dlg_params()
940 min_ttu_vblank = get_min_ttu_vblank(mode_lib, e2e_pipe_param, num_pipes, pipe_idx); in dml20_rq_dlg_get_dlg_params()
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Ddisplay_rq_dlg_calc_20v2.c47 const display_e2e_pipe_params_st *e2e_pipe_param,
785 const display_e2e_pipe_params_st *e2e_pipe_param, in dml20v2_rq_dlg_get_dlg_params() argument
795 const display_pipe_source_params_st *src = &e2e_pipe_param[pipe_idx].pipe.src; in dml20v2_rq_dlg_get_dlg_params()
796 const display_pipe_dest_params_st *dst = &e2e_pipe_param[pipe_idx].pipe.dest; in dml20v2_rq_dlg_get_dlg_params()
797 const display_output_params_st *dout = &e2e_pipe_param[pipe_idx].dout; in dml20v2_rq_dlg_get_dlg_params()
798 const display_clocks_and_cfg_st *clks = &e2e_pipe_param[pipe_idx].clks_cfg; in dml20v2_rq_dlg_get_dlg_params()
799 const scaler_ratio_depth_st *scl = &e2e_pipe_param[pipe_idx].pipe.scale_ratio_depth; in dml20v2_rq_dlg_get_dlg_params()
800 const scaler_taps_st *taps = &e2e_pipe_param[pipe_idx].pipe.scale_taps; in dml20v2_rq_dlg_get_dlg_params()
939 t_calc_us = get_tcalc(mode_lib, e2e_pipe_param, num_pipes); in dml20v2_rq_dlg_get_dlg_params()
940 min_ttu_vblank = get_min_ttu_vblank(mode_lib, e2e_pipe_param, num_pipes, pipe_idx); in dml20v2_rq_dlg_get_dlg_params()
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Ddisplay_rq_dlg_calc_20.h64 const display_e2e_pipe_params_st *e2e_pipe_param,
Ddisplay_rq_dlg_calc_20v2.h64 const display_e2e_pipe_params_st *e2e_pipe_param,
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn21/
Ddisplay_rq_dlg_calc_21.c831 const display_e2e_pipe_params_st *e2e_pipe_param, in dml_rq_dlg_get_dlg_params() argument
841 const display_pipe_source_params_st *src = &e2e_pipe_param[pipe_idx].pipe.src; in dml_rq_dlg_get_dlg_params()
842 const display_pipe_dest_params_st *dst = &e2e_pipe_param[pipe_idx].pipe.dest; in dml_rq_dlg_get_dlg_params()
843 const display_output_params_st *dout = &e2e_pipe_param[pipe_idx].dout; in dml_rq_dlg_get_dlg_params()
844 const display_clocks_and_cfg_st *clks = &e2e_pipe_param[pipe_idx].clks_cfg; in dml_rq_dlg_get_dlg_params()
845 const scaler_ratio_depth_st *scl = &e2e_pipe_param[pipe_idx].pipe.scale_ratio_depth; in dml_rq_dlg_get_dlg_params()
846 const scaler_taps_st *taps = &e2e_pipe_param[pipe_idx].pipe.scale_taps; in dml_rq_dlg_get_dlg_params()
985 t_calc_us = get_tcalc(mode_lib, e2e_pipe_param, num_pipes); in dml_rq_dlg_get_dlg_params()
986 min_ttu_vblank = get_min_ttu_vblank(mode_lib, e2e_pipe_param, num_pipes, pipe_idx); in dml_rq_dlg_get_dlg_params()
1068 double dsc_delay = get_dsc_delay(mode_lib, e2e_pipe_param, num_pipes, pipe_idx); in dml_rq_dlg_get_dlg_params()
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Ddisplay_rq_dlg_calc_21.h64 const display_e2e_pipe_params_st *e2e_pipe_param,