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Searched refs:dwbc_shift (Results 1 – 8 of 8) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_dwb_cm.c44 dwbc30->dwbc_shift->field_name, dwbc30->dwbc_mask->field_name
52 reg->shifts.field_region_start_base = dwbc30->dwbc_shift->DWB_OGAM_RAMA_EXP_REGION_START_BASE_B; in dwb3_get_reg_field_ogam()
54 reg->shifts.field_offset = dwbc30->dwbc_shift->DWB_OGAM_RAMA_OFFSET_B; in dwb3_get_reg_field_ogam()
57 reg->shifts.exp_region0_lut_offset = dwbc30->dwbc_shift->DWB_OGAM_RAMA_EXP_REGION0_LUT_OFFSET; in dwb3_get_reg_field_ogam()
59 reg->shifts.exp_region0_num_segments = dwbc30->dwbc_shift->DWB_OGAM_RAMA_EXP_REGION0_NUM_SEGMENTS; in dwb3_get_reg_field_ogam()
61 reg->shifts.exp_region1_lut_offset = dwbc30->dwbc_shift->DWB_OGAM_RAMA_EXP_REGION1_LUT_OFFSET; in dwb3_get_reg_field_ogam()
63 reg->shifts.exp_region1_num_segments = dwbc30->dwbc_shift->DWB_OGAM_RAMA_EXP_REGION1_NUM_SEGMENTS; in dwb3_get_reg_field_ogam()
66 reg->shifts.field_region_end = dwbc30->dwbc_shift->DWB_OGAM_RAMA_EXP_REGION_END_B; in dwb3_get_reg_field_ogam()
68 reg->shifts.field_region_end_slope = dwbc30->dwbc_shift->DWB_OGAM_RAMA_EXP_REGION_END_SLOPE_B; in dwb3_get_reg_field_ogam()
70 reg->shifts.field_region_end_base = dwbc30->dwbc_shift->DWB_OGAM_RAMA_EXP_REGION_END_BASE_B; in dwb3_get_reg_field_ogam()
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Ddcn30_dwb.c41 dwbc30->dwbc_shift->field_name, dwbc30->dwbc_mask->field_name
239 const struct dcn30_dwbc_shift *dwbc_shift, in dcn30_dwbc_construct() argument
249 dwbc30->dwbc_shift = dwbc_shift; in dcn30_dwbc_construct()
Ddcn30_dwb.h878 const struct dcn30_dwbc_shift *dwbc_shift; member
885 const struct dcn30_dwbc_shift *dwbc_shift,
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_dwb.c42 dwbc10->dwbc_shift->field_name, dwbc10->dwbc_mask->field_name
119 const struct dcn10_dwbc_shift *dwbc_shift, in dcn10_dwbc_construct() argument
129 dwbc10->dwbc_shift = dwbc_shift; in dcn10_dwbc_construct()
Ddcn10_dwb.h258 const struct dcn10_dwbc_shift *dwbc_shift; member
265 const struct dcn10_dwbc_shift *dwbc_shift,
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_dwb.c43 dwbc20->dwbc_shift->field_name, dwbc20->dwbc_mask->field_name
319 const struct dcn20_dwbc_shift *dwbc_shift, in dcn20_dwbc_construct() argument
329 dwbc20->dwbc_shift = dwbc_shift; in dcn20_dwbc_construct()
Ddcn20_dwb.h418 const struct dcn20_dwbc_shift *dwbc_shift; member
425 const struct dcn20_dwbc_shift *dwbc_shift,
Ddcn20_dwb_scl.c44 dwbc20->dwbc_shift->field_name, dwbc20->dwbc_mask->field_name