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Searched refs:dsc_cfg (Results 1 – 23 of 23) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/display/
Ddrm_dsc_helper.c98 const struct drm_dsc_config *dsc_cfg) in drm_dsc_pps_payload_pack() argument
110 dsc_cfg->dsc_version_minor | in drm_dsc_pps_payload_pack()
111 dsc_cfg->dsc_version_major << DSC_PPS_VERSION_MAJOR_SHIFT; in drm_dsc_pps_payload_pack()
117 dsc_cfg->line_buf_depth | in drm_dsc_pps_payload_pack()
118 dsc_cfg->bits_per_component << DSC_PPS_BPC_SHIFT; in drm_dsc_pps_payload_pack()
122 ((dsc_cfg->bits_per_pixel & DSC_PPS_BPP_HIGH_MASK) >> in drm_dsc_pps_payload_pack()
124 dsc_cfg->vbr_enable << DSC_PPS_VBR_EN_SHIFT | in drm_dsc_pps_payload_pack()
125 dsc_cfg->simple_422 << DSC_PPS_SIMPLE422_SHIFT | in drm_dsc_pps_payload_pack()
126 dsc_cfg->convert_rgb << DSC_PPS_CONVERT_RGB_SHIFT | in drm_dsc_pps_payload_pack()
127 dsc_cfg->block_pred_enable << DSC_PPS_BLOCK_PRED_EN_SHIFT; in drm_dsc_pps_payload_pack()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dsc/
Drc_calc_dpi.c71 static void copy_rc_to_cfg(struct drm_dsc_config *dsc_cfg, const struct rc_params *rc) in copy_rc_to_cfg() argument
75 dsc_cfg->rc_quant_incr_limit0 = rc->rc_quant_incr_limit0; in copy_rc_to_cfg()
76 dsc_cfg->rc_quant_incr_limit1 = rc->rc_quant_incr_limit1; in copy_rc_to_cfg()
77 dsc_cfg->initial_offset = rc->initial_fullness_offset; in copy_rc_to_cfg()
78 dsc_cfg->initial_xmit_delay = rc->initial_xmit_delay; in copy_rc_to_cfg()
79 dsc_cfg->first_line_bpg_offset = rc->first_line_bpg_offset; in copy_rc_to_cfg()
80 dsc_cfg->second_line_bpg_offset = rc->second_line_bpg_offset; in copy_rc_to_cfg()
81 dsc_cfg->flatness_min_qp = rc->flatness_min_qp; in copy_rc_to_cfg()
82 dsc_cfg->flatness_max_qp = rc->flatness_max_qp; in copy_rc_to_cfg()
84 dsc_cfg->rc_range_params[i].range_min_qp = rc->qp_min[i]; in copy_rc_to_cfg()
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Ddc_dsc.c84 struct dc_dsc_config *dsc_cfg);
745 struct dc_dsc_config *dsc_cfg) in setup_dsc_config() argument
761 memset(dsc_cfg, 0, sizeof(struct dc_dsc_config)); in setup_dsc_config()
783 dsc_cfg->ycbcr422_simple = false; in setup_dsc_config()
801 dsc_cfg->ycbcr422_simple = is_dsc_possible; in setup_dsc_config()
903 dsc_cfg->num_slices_h = num_slices_h; in setup_dsc_config()
927 dsc_cfg->num_slices_v = pic_height/slice_height; in setup_dsc_config()
937 dsc_cfg->bits_per_pixel = target_bpp; in setup_dsc_config()
945 dsc_cfg->block_pred_enable = dsc_common_caps.is_block_pred_supported; in setup_dsc_config()
946 dsc_cfg->linebuf_depth = dsc_common_caps.lb_bit_depth; in setup_dsc_config()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_dsc.c33 static bool dsc_prepare_config(const struct dsc_config *dsc_cfg, struct dsc_reg_values *dsc_reg_val…
44 …bool dsc2_validate_stream(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg);
45 static void dsc2_set_config(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg,
47 …cked_pps(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg, uint8_t *dsc_pac…
174 … bool dsc2_validate_stream(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg) in dsc2_validate_stream() argument
179 if (dsc_cfg->pic_width > dsc20->max_image_width) in dsc2_validate_stream()
182 return dsc_prepare_config(dsc_cfg, &dsc20->reg_vals, &dsc_optc_cfg); in dsc2_validate_stream()
197 static void dsc2_set_config(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg, in dsc2_set_config() argument
205 dsc_config_log(dsc, dsc_cfg); in dsc2_set_config()
206 is_config_ok = dsc_prepare_config(dsc_cfg, &dsc20->reg_vals, dsc_optc_cfg); in dsc2_set_config()
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Ddcn20_resource.c1661 struct dsc_config dsc_cfg; in dcn20_validate_dsc() local
1672 dsc_cfg.pic_width = (stream->timing.h_addressable + stream->timing.h_border_left in dcn20_validate_dsc()
1674 dsc_cfg.pic_height = stream->timing.v_addressable + stream->timing.v_border_top in dcn20_validate_dsc()
1676 dsc_cfg.pixel_encoding = stream->timing.pixel_encoding; in dcn20_validate_dsc()
1677 dsc_cfg.color_depth = stream->timing.display_color_depth; in dcn20_validate_dsc()
1678 dsc_cfg.is_odm = pipe_ctx->next_odm_pipe ? true : false; in dcn20_validate_dsc()
1679 dsc_cfg.dc_dsc_cfg = stream->timing.dsc_cfg; in dcn20_validate_dsc()
1680 dsc_cfg.dc_dsc_cfg.num_slices_h /= opp_cnt; in dcn20_validate_dsc()
1682 if (!pipe_ctx->stream_res.dsc->funcs->dsc_validate_stream(pipe_ctx->stream_res.dsc, &dsc_cfg)) in dcn20_validate_dsc()
Ddcn20_stream_encoder.c448 && !timing->dsc_cfg.ycbcr422_simple); in is_two_pixels_per_containter()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn314/
Ddcn314_hwseq.c109 struct dsc_config dsc_cfg; in update_dsc_on_stream() local
114dsc_cfg.pic_width = (stream->timing.h_addressable + stream->timing.h_border_left + stream->timing.… in update_dsc_on_stream()
115dsc_cfg.pic_height = stream->timing.v_addressable + stream->timing.v_border_top + stream->timing.v… in update_dsc_on_stream()
116 dsc_cfg.pixel_encoding = stream->timing.pixel_encoding; in update_dsc_on_stream()
117 dsc_cfg.color_depth = stream->timing.display_color_depth; in update_dsc_on_stream()
118 dsc_cfg.is_odm = pipe_ctx->next_odm_pipe ? true : false; in update_dsc_on_stream()
119 dsc_cfg.dc_dsc_cfg = stream->timing.dsc_cfg; in update_dsc_on_stream()
120 ASSERT(dsc_cfg.dc_dsc_cfg.num_slices_h % opp_cnt == 0); in update_dsc_on_stream()
121 dsc_cfg.dc_dsc_cfg.num_slices_h /= opp_cnt; in update_dsc_on_stream()
123 dsc->funcs->dsc_set_config(dsc, &dsc_cfg, &dsc_optc_cfg); in update_dsc_on_stream()
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Ddcn314_dio_stream_encoder.c273 && !timing->dsc_cfg.ycbcr422_simple); in is_two_pixels_per_containter()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/inc/hw/
Ddsc.h100 …ol (*dsc_validate_stream)(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg);
101 void (*dsc_set_config)(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg,
103 bool (*dsc_get_packed_pps)(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg,
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/core/
Ddc_stream.c107 memset(&stream->timing.dsc_cfg, 0, sizeof(stream->timing.dsc_cfg)); in dc_stream_construct()
108 stream->timing.dsc_cfg.num_slices_h = 0; in dc_stream_construct()
109 stream->timing.dsc_cfg.num_slices_v = 0; in dc_stream_construct()
110 stream->timing.dsc_cfg.bits_per_pixel = 128; in dc_stream_construct()
111 stream->timing.dsc_cfg.block_pred_enable = 1; in dc_stream_construct()
112 stream->timing.dsc_cfg.linebuf_depth = 9; in dc_stream_construct()
113 stream->timing.dsc_cfg.version_minor = 2; in dc_stream_construct()
114 stream->timing.dsc_cfg.ycbcr422_simple = 0; in dc_stream_construct()
759 stream->timing.dsc_cfg.mst_pbn); in dc_stream_log()
Ddc_link_dp.c7411 struct dsc_config dsc_cfg; in dp_set_dsc_on_stream() local
7416dsc_cfg.pic_width = (stream->timing.h_addressable + stream->timing.h_border_left + stream->timing.… in dp_set_dsc_on_stream()
7417dsc_cfg.pic_height = stream->timing.v_addressable + stream->timing.v_border_top + stream->timing.v… in dp_set_dsc_on_stream()
7418 dsc_cfg.pixel_encoding = stream->timing.pixel_encoding; in dp_set_dsc_on_stream()
7419 dsc_cfg.color_depth = stream->timing.display_color_depth; in dp_set_dsc_on_stream()
7420 dsc_cfg.is_odm = pipe_ctx->next_odm_pipe ? true : false; in dp_set_dsc_on_stream()
7421 dsc_cfg.dc_dsc_cfg = stream->timing.dsc_cfg; in dp_set_dsc_on_stream()
7422 ASSERT(dsc_cfg.dc_dsc_cfg.num_slices_h % opp_cnt == 0); in dp_set_dsc_on_stream()
7423 dsc_cfg.dc_dsc_cfg.num_slices_h /= opp_cnt; in dp_set_dsc_on_stream()
7425 dsc->funcs->dsc_set_config(dsc, &dsc_cfg, &dsc_optc_cfg); in dp_set_dsc_on_stream()
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Ddc_link.c2899 if (timing->flags.DSC && !timing->dsc_cfg.is_frl) in dp_active_dongle_validate_timing()
4806 timing->dsc_cfg.bits_per_pixel, in dc_bandwidth_in_kbps_from_timing()
4807 timing->dsc_cfg.num_slices_h, in dc_bandwidth_in_kbps_from_timing()
4808 timing->dsc_cfg.is_dp); in dc_bandwidth_in_kbps_from_timing()
Ddc.c2867 struct dc_dsc_config old_dsc_cfg = stream->timing.dsc_cfg; in copy_stream_update_to_stream()
2878 stream->timing.dsc_cfg = *update->dsc_config; in copy_stream_update_to_stream()
2881 stream->timing.dsc_cfg = old_dsc_cfg; in copy_stream_update_to_stream()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn32/
Ddcn32_hwseq.c1029 struct dsc_config dsc_cfg; in update_dsc_on_stream() local
1034dsc_cfg.pic_width = (stream->timing.h_addressable + stream->timing.h_border_left + stream->timing.… in update_dsc_on_stream()
1035dsc_cfg.pic_height = stream->timing.v_addressable + stream->timing.v_border_top + stream->timing.v… in update_dsc_on_stream()
1036 dsc_cfg.pixel_encoding = stream->timing.pixel_encoding; in update_dsc_on_stream()
1037 dsc_cfg.color_depth = stream->timing.display_color_depth; in update_dsc_on_stream()
1038 dsc_cfg.is_odm = pipe_ctx->next_odm_pipe ? true : false; in update_dsc_on_stream()
1039 dsc_cfg.dc_dsc_cfg = stream->timing.dsc_cfg; in update_dsc_on_stream()
1040 ASSERT(dsc_cfg.dc_dsc_cfg.num_slices_h % opp_cnt == 0); in update_dsc_on_stream()
1041 dsc_cfg.dc_dsc_cfg.num_slices_h /= opp_cnt; in update_dsc_on_stream()
1043 dsc->funcs->dsc_set_config(dsc, &dsc_cfg, &dsc_optc_cfg); in update_dsc_on_stream()
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Ddcn32_dio_stream_encoder.c242 && !timing->dsc_cfg.ycbcr422_simple); in is_two_pixels_per_containter()
/linux-6.1.9/include/drm/display/
Ddrm_dsc_helper.h16 const struct drm_dsc_config *dsc_cfg);
/linux-6.1.9/drivers/gpu/drm/amd/display/amdgpu_dm/
Damdgpu_dm_mst_types.c647 memset(&params[i].timing->dsc_cfg, 0, sizeof(params[i].timing->dsc_cfg)); in set_dsc_configs_from_fairness_vars()
655 &params[i].timing->dsc_cfg)) { in set_dsc_configs_from_fairness_vars()
659 params[i].timing->dsc_cfg.bits_per_pixel = params[i].bpp_overwrite; in set_dsc_configs_from_fairness_vars()
661 params[i].timing->dsc_cfg.bits_per_pixel = vars[i + k].bpp_x16; in set_dsc_configs_from_fairness_vars()
664 params[i].timing->dsc_cfg.num_slices_h = params[i].num_slices_h; in set_dsc_configs_from_fairness_vars()
667 params[i].timing->dsc_cfg.num_slices_v = params[i].num_slices_v; in set_dsc_configs_from_fairness_vars()
671 params[i].timing->dsc_cfg.mst_pbn = vars[i + k].pbn; in set_dsc_configs_from_fairness_vars()
684 params[i].timing->dsc_cfg.bits_per_pixel, in set_dsc_configs_from_fairness_vars()
Damdgpu_dm.c5599 struct dc_dsc_config dsc_cfg = {0}; in apply_dsc_policy_for_edp() local
5626 &dsc_cfg)) { in apply_dsc_policy_for_edp()
5627 stream->timing.dsc_cfg = dsc_cfg; in apply_dsc_policy_for_edp()
5629 stream->timing.dsc_cfg.bits_per_pixel = edp_max_bpp_x16; in apply_dsc_policy_for_edp()
5641 &dsc_cfg)) { in apply_dsc_policy_for_edp()
5642 stream->timing.dsc_cfg = dsc_cfg; in apply_dsc_policy_for_edp()
5683 &stream->timing.dsc_cfg)) { in apply_dsc_policy_for_stream()
5701 &stream->timing.dsc_cfg)) { in apply_dsc_policy_for_stream()
5714 stream->timing.dsc_cfg.num_slices_h = aconnector->dsc_settings.dsc_num_slices_h; in apply_dsc_policy_for_stream()
5717 stream->timing.dsc_cfg.num_slices_v = aconnector->dsc_settings.dsc_num_slices_v; in apply_dsc_policy_for_stream()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/
Ddc_dsc.h78 struct dc_dsc_config *dsc_cfg);
Ddc_hw_types.h935 struct dc_dsc_config dsc_cfg; member
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn31/
Ddcn31_dccg.c537 && !params->timing->dsc_cfg.ycbcr422_simple)) { in dccg31_set_dtbclk_dto()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn20/
Ddcn20_fpu.c1217 pipes[pipe_cnt].dout.dsc_slices = res_ctx->pipe_ctx[i].stream->timing.dsc_cfg.num_slices_h; in dcn20_populate_dml_pipes_from_context()
1358 !res_ctx->pipe_ctx[i].stream->timing.dsc_cfg.ycbcr422_simple) in dcn20_populate_dml_pipes_from_context()
1370 …pipes[pipe_cnt].dout.output_bpp = res_ctx->pipe_ctx[i].stream->timing.dsc_cfg.bits_per_pixel / 16.… in dcn20_populate_dml_pipes_from_context()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_optc.c1609 && !timing->dsc_cfg.ycbcr422_simple); in optc1_is_two_pixels_per_containter()