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Searched refs:drm_dbg_kms (Results 1 – 25 of 92) sorted by relevance

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/linux-6.1.9/drivers/gpu/drm/i915/display/
Dintel_crtc_state_dump.c15 drm_dbg_kms(&i915->drm, "crtc timings: %d %d %d %d %d %d %d %d %d, " in intel_dump_crtc_timings()
32 drm_dbg_kms(&i915->drm, in intel_dump_m_n_config()
125 drm_dbg_kms(&i915->drm, in intel_dump_plane_state()
132 drm_dbg_kms(&i915->drm, in intel_dump_plane_state()
137 drm_dbg_kms(&i915->drm, "\trotation: 0x%x, scaler: %d, scaling_filter: %d\n", in intel_dump_plane_state()
140 drm_dbg_kms(&i915->drm, in intel_dump_plane_state()
157 drm_dbg_kms(&i915->drm, "[CRTC:%d:%s] enable: %s [%s]\n", in intel_crtc_state_dump()
165 drm_dbg_kms(&i915->drm, in intel_crtc_state_dump()
171 drm_dbg_kms(&i915->drm, in intel_crtc_state_dump()
176 drm_dbg_kms(&i915->drm, "MST master transcoder: %s\n", in intel_crtc_state_dump()
[all …]
Dintel_dsi_vbt.c160 drm_dbg_kms(&dev_priv->drm, "\n"); in mipi_exec_send_packet()
177 drm_dbg_kms(&dev_priv->drm, "no dsi device for port %c\n", in mipi_exec_send_packet()
237 drm_dbg_kms(&i915->drm, "\n"); in mipi_exec_delay()
255 drm_dbg_kms(&dev_priv->drm, "unknown gpio index %u\n", in vlv_exec_gpio()
269 drm_dbg_kms(&dev_priv->drm, "SC gpio not supported\n"); in vlv_exec_gpio()
272 drm_dbg_kms(&dev_priv->drm, in vlv_exec_gpio()
318 drm_dbg_kms(&dev_priv->drm, in chv_exec_gpio()
324 drm_dbg_kms(&dev_priv->drm, in chv_exec_gpio()
379 drm_dbg_kms(&dev_priv->drm, "Skipping ICL GPIO element execution\n"); in icl_exec_gpio()
487 drm_dbg_kms(&dev_priv->drm, "GPIO index %u, number %u, source %u, native %s, set to %s\n", in mipi_exec_gpio()
[all …]
Dintel_lspcon.c98 drm_dbg_kms(&i915->drm, "Vendor: Mega Chips\n"); in lspcon_detect_vendor()
103 drm_dbg_kms(&i915->drm, "Vendor: Parade Tech\n"); in lspcon_detect_vendor()
133 drm_dbg_kms(&i915->drm, "HDR capability detection failed\n"); in lspcon_detect_hdr_capability()
136 drm_dbg_kms(&i915->drm, "LSPCON capable of HDR\n"); in lspcon_detect_hdr_capability()
149 drm_dbg_kms(&i915->drm, "Error reading LSPCON mode\n"); in lspcon_get_current_mode()
166 drm_dbg_kms(&i915->drm, "Waiting for LSPCON mode %s to settle\n", in lspcon_wait_mode()
174 drm_dbg_kms(&i915->drm, "Current LSPCON mode %s\n", in lspcon_wait_mode()
196 drm_dbg_kms(&i915->drm, "Current mode = desired LSPCON mode\n"); in lspcon_change_mode()
207 drm_dbg_kms(&i915->drm, "LSPCON mode changed done\n"); in lspcon_change_mode()
219 drm_dbg_kms(&i915->drm, "Native AUX CH down\n"); in lspcon_wake_native_aux_ch()
[all …]
Dintel_psr.c176 drm_dbg_kms(&i915->drm, "PSR exit events: 0x%x\n", val); in psr_event_print()
178 drm_dbg_kms(&i915->drm, "\tPSR2 watchdog timer expired\n"); in psr_event_print()
180 drm_dbg_kms(&i915->drm, "\tPSR2 disabled\n"); in psr_event_print()
182 drm_dbg_kms(&i915->drm, "\tSU dirty FIFO underrun\n"); in psr_event_print()
184 drm_dbg_kms(&i915->drm, "\tSU CRC FIFO underrun\n"); in psr_event_print()
186 drm_dbg_kms(&i915->drm, "\tGraphics reset\n"); in psr_event_print()
188 drm_dbg_kms(&i915->drm, "\tPCH interrupt\n"); in psr_event_print()
190 drm_dbg_kms(&i915->drm, "\tMemory up\n"); in psr_event_print()
192 drm_dbg_kms(&i915->drm, "\tFront buffer modification\n"); in psr_event_print()
194 drm_dbg_kms(&i915->drm, "\tPSR watchdog timer expired\n"); in psr_event_print()
[all …]
Dintel_hdcp.c172 drm_dbg_kms(&i915->drm, "Bksv is invalid\n"); in intel_hdcp_read_valid_bksv()
606 drm_dbg_kms(&dev_priv->drm, "Invalid number of leftovers %d\n", in intel_hdcp_validate_v_prime()
639 drm_dbg_kms(&dev_priv->drm, "SHA-1 mismatch, HDCP failed\n"); in intel_hdcp_validate_v_prime()
658 drm_dbg_kms(&dev_priv->drm, in intel_hdcp_auth_downstream()
669 drm_dbg_kms(&dev_priv->drm, "Max Topology Limit Exceeded\n"); in intel_hdcp_auth_downstream()
682 drm_dbg_kms(&dev_priv->drm, in intel_hdcp_auth_downstream()
689 drm_dbg_kms(&dev_priv->drm, "Out of mem: ksv_fifo\n"); in intel_hdcp_auth_downstream()
717 drm_dbg_kms(&dev_priv->drm, in intel_hdcp_auth_downstream()
722 drm_dbg_kms(&dev_priv->drm, "HDCP is enabled (%d downstream devices)\n", in intel_hdcp_auth_downstream()
766 drm_dbg_kms(&dev_priv->drm, in intel_hdcp_auth()
[all …]
Dintel_dp_link_training.c54 drm_dbg_kms(&dp_to_i915(intel_dp)->drm, in intel_dp_read_lttpr_phy_caps()
61 drm_dbg_kms(&dp_to_i915(intel_dp)->drm, in intel_dp_read_lttpr_phy_caps()
80 drm_dbg_kms(&dp_to_i915(intel_dp)->drm, in intel_dp_read_lttpr_common_caps()
141 drm_dbg_kms(&i915->drm, in intel_dp_init_lttpr()
417 drm_dbg_kms(&i915->drm, "[ENCODER:%d:%s][%s] 128b/132b, lanes: %d, " in intel_dp_get_adjust_train()
424 drm_dbg_kms(&i915->drm, "[ENCODER:%d:%s][%s] 8b/10b, lanes: %d, " in intel_dp_get_adjust_train()
495 drm_dbg_kms(&i915->drm, in intel_dp_program_link_training_pattern()
537 drm_dbg_kms(&i915->drm, "[ENCODER:%d:%s][%s] 128b/132b, lanes: %d, " in intel_dp_set_signal_levels()
544 drm_dbg_kms(&i915->drm, "[ENCODER:%d:%s][%s] 8b/10b, lanes: %d, " in intel_dp_set_signal_levels()
674 drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] Reloading eDP link rates\n", in intel_dp_prepare_link_train()
[all …]
Dintel_fbdev.c222 drm_dbg_kms(&dev_priv->drm, in intelfb_create()
231 drm_dbg_kms(&dev_priv->drm, in intelfb_create()
238 drm_dbg_kms(&dev_priv->drm, "re-using BIOS fb\n"); in intelfb_create()
312 drm_dbg_kms(&dev_priv->drm, "allocated %dx%d fb: 0x%08x\n", in intelfb_create()
380 drm_dbg_kms(&i915->drm, in intel_fbdev_init_bios()
387 drm_dbg_kms(&i915->drm, in intel_fbdev_init_bios()
394 drm_dbg_kms(&i915->drm, in intel_fbdev_init_bios()
403 drm_dbg_kms(&i915->drm, in intel_fbdev_init_bios()
417 drm_dbg_kms(&i915->drm, in intel_fbdev_init_bios()
423 drm_dbg_kms(&i915->drm, "checking [PLANE:%d:%s] for BIOS fb\n", in intel_fbdev_init_bios()
[all …]
Dintel_fdi.c136 drm_dbg_kms(&dev_priv->drm, in ilk_check_fdi_lanes()
140 drm_dbg_kms(&dev_priv->drm, in ilk_check_fdi_lanes()
148 drm_dbg_kms(&dev_priv->drm, in ilk_check_fdi_lanes()
175 drm_dbg_kms(&dev_priv->drm, in ilk_check_fdi_lanes()
183 drm_dbg_kms(&dev_priv->drm, in ilk_check_fdi_lanes()
196 drm_dbg_kms(&dev_priv->drm, in ilk_check_fdi_lanes()
267 drm_dbg_kms(&i915->drm, in ilk_fdi_compute_config()
301 drm_dbg_kms(&dev_priv->drm, "%sabling fdi C rx\n", in cpt_set_fdi_bc_bifurcation()
429 drm_dbg_kms(&dev_priv->drm, "FDI_RX_IIR 0x%x\n", temp); in ilk_fdi_link_train()
432 drm_dbg_kms(&dev_priv->drm, "FDI train 1 done.\n"); in ilk_fdi_link_train()
[all …]
Dintel_bios.c383 drm_dbg_kms(&i915->drm, "Generating LFP data table pointers\n"); in generate_lfp_data_ptrs()
495 drm_dbg_kms(&i915->drm, "Found BDB block %d (size %zu, min size %zu)\n", in init_bdb_block()
615 drm_dbg_kms(&i915->drm, "%s PNPID mfg: %s (0x%x), prod: %u, serial: %u, week: %d, year: %d\n", in dump_pnp_id()
640 drm_dbg_kms(&i915->drm, "Invalid VBT panel type 0x%x\n", in vbt_get_panel_type()
753 drm_dbg_kms(&i915->drm, "Panel type (%s): %d\n", in get_panel_type()
768 drm_dbg_kms(&i915->drm, "Selected panel type (%s): %d\n", in get_panel_type()
817 drm_dbg_kms(&i915->drm, "DRRS supported mode is static\n"); in parse_panel_options()
821 drm_dbg_kms(&i915->drm, in parse_panel_options()
826 drm_dbg_kms(&i915->drm, in parse_panel_options()
855 drm_dbg_kms(&i915->drm, in parse_lfp_panel_dtd()
[all …]
Dintel_dp.c619 drm_dbg_kms(&i915->drm, in intel_dp_get_link_train_fallback_values()
633 drm_dbg_kms(&i915->drm, in intel_dp_get_link_train_fallback_values()
644 drm_dbg_kms(&i915->drm, in intel_dp_get_link_train_fallback_values()
716 drm_dbg_kms(&i915->drm, "Unsupported BPP %u, min %u\n", in intel_dp_dsc_get_output_bpp()
757 drm_dbg_kms(&i915->drm, in intel_dp_dsc_get_slice_count()
783 drm_dbg_kms(&i915->drm, "Unsupported Slice Count %d\n", in intel_dp_dsc_get_slice_count()
1101 drm_dbg_kms(&i915->drm, "source rates: %s\n", str); in intel_dp_print_rates()
1105 drm_dbg_kms(&i915->drm, "sink rates: %s\n", str); in intel_dp_print_rates()
1109 drm_dbg_kms(&i915->drm, "common rates: %s\n", str); in intel_dp_print_rates()
1251 drm_dbg_kms(&dev_priv->drm, in intel_dp_max_bpp()
[all …]
Dintel_dp_hdcp.c70 drm_dbg_kms(&i915->drm, in intel_dp_hdcp_write_an_aksv()
86 drm_dbg_kms(&i915->drm, in intel_dp_hdcp_write_an_aksv()
103 drm_dbg_kms(&i915->drm, in intel_dp_hdcp_read_bksv()
124 drm_dbg_kms(&i915->drm, in intel_dp_hdcp_read_bstatus()
141 drm_dbg_kms(&i915->drm, in intel_dp_hdcp_read_bcaps()
174 drm_dbg_kms(&i915->drm, "Read Ri' from DP/AUX failed (%zd)\n", in intel_dp_hdcp_read_ri_prime()
192 drm_dbg_kms(&i915->drm, in intel_dp_hdcp_read_ksv_ready()
216 drm_dbg_kms(&i915->drm, in intel_dp_hdcp_read_ksv_fifo()
239 drm_dbg_kms(&i915->drm, in intel_dp_hdcp_read_v_prime_part()
266 drm_dbg_kms(&i915->drm, in intel_dp_hdcp_check_link()
[all …]
Dintel_pps.c66 drm_dbg_kms(&dev_priv->drm, in vlv_power_sequencer_kick()
190 drm_dbg_kms(&dev_priv->drm, in vlv_power_sequencer_pipe()
303 drm_dbg_kms(&dev_priv->drm, in vlv_initial_power_sequencer_setup()
310 drm_dbg_kms(&dev_priv->drm, in vlv_initial_power_sequencer_setup()
443 drm_dbg_kms(&dev_priv->drm, "Status 0x%08x Control 0x%08x\n", in intel_pps_check_power_unlocked()
474 drm_dbg_kms(&dev_priv->drm, in wait_panel_status()
487 drm_dbg_kms(&dev_priv->drm, "Wait complete\n"); in wait_panel_status()
494 drm_dbg_kms(&i915->drm, "Wait for panel power on\n"); in wait_panel_on()
502 drm_dbg_kms(&i915->drm, "Wait for panel power off time\n"); in wait_panel_off()
512 drm_dbg_kms(&i915->drm, "Wait for panel power cycle\n"); in wait_panel_power_cycle()
[all …]
Dintel_tc.c238 drm_dbg_kms(&i915->drm, in tc_port_fixup_legacy_flag()
257 drm_dbg_kms(&i915->drm, in icl_tc_port_live_status_mask()
334 drm_dbg_kms(&i915->drm, in icl_tc_phy_status_complete()
359 drm_dbg_kms(&i915->drm, in adl_tc_phy_status_complete()
388 drm_dbg_kms(&i915->drm, in icl_tc_phy_take_ownership()
442 drm_dbg_kms(&i915->drm, in icl_tc_phy_is_owned()
491 drm_dbg_kms(&i915->drm, "Port %s: PHY not ready\n", in icl_tc_phy_connect()
499 drm_dbg_kms(&i915->drm, "Port %s: PHY ownership not required (live status %02x)\n", in icl_tc_phy_connect()
521 drm_dbg_kms(&i915->drm, "Port %s: PHY sudden disconnect\n", in icl_tc_phy_connect()
527 drm_dbg_kms(&i915->drm, in icl_tc_phy_connect()
[all …]
Dintel_crt.c437 drm_dbg_kms(&dev_priv->drm, in hsw_crt_compute_config()
469 drm_dbg_kms(&dev_priv->drm, in ilk_crt_detect_hotplug()
482 drm_dbg_kms(&dev_priv->drm, in ilk_crt_detect_hotplug()
497 drm_dbg_kms(&dev_priv->drm, "ironlake hotplug adpa=0x%x, result %d\n", in ilk_crt_detect_hotplug()
528 drm_dbg_kms(&dev_priv->drm, in valleyview_crt_detect_hotplug()
537 drm_dbg_kms(&dev_priv->drm, in valleyview_crt_detect_hotplug()
549 drm_dbg_kms(&dev_priv->drm, in valleyview_crt_detect_hotplug()
590 drm_dbg_kms(&dev_priv->drm, in intel_crt_detect_hotplug()
614 drm_dbg_kms(connector->dev, in intel_crt_get_edid()
661 drm_dbg_kms(&dev_priv->drm, in intel_crt_detect_ddc()
[all …]
Dvlv_dsi_pll.c187 drm_dbg_kms(&dev_priv->drm, "dsi_calc_mnp failed\n"); in vlv_dsi_pll_compute()
199 drm_dbg_kms(&dev_priv->drm, "dsi pll div %08x, ctrl %08x\n", in vlv_dsi_pll_compute()
218 drm_dbg_kms(&dev_priv->drm, "\n"); in vlv_dsi_pll_enable()
243 drm_dbg_kms(&dev_priv->drm, "DSI PLL locked\n"); in vlv_dsi_pll_enable()
251 drm_dbg_kms(&dev_priv->drm, "\n"); in vlv_dsi_pll_disable()
307 drm_dbg_kms(&dev_priv->drm, "\n"); in bxt_dsi_pll_disable()
329 drm_dbg_kms(&dev_priv->drm, "\n"); in vlv_dsi_get_pclk()
513 drm_dbg_kms(&dev_priv->drm, "DSI PLL calculation is Done!!\n"); in bxt_dsi_pll_compute()
547 drm_dbg_kms(&dev_priv->drm, "\n"); in bxt_dsi_pll_enable()
574 drm_dbg_kms(&dev_priv->drm, "DSI PLL locked\n"); in bxt_dsi_pll_enable()
Dintel_hdmi.c696 drm_dbg_kms(encoder->base.dev, in intel_read_infoframe()
702 drm_dbg_kms(encoder->base.dev, in intel_read_infoframe()
844 drm_dbg_kms(&dev_priv->drm, in intel_hdmi_compute_drm_infoframe()
885 drm_dbg_kms(&dev_priv->drm, in g4x_set_infoframes()
899 drm_dbg_kms(&dev_priv->drm, in g4x_set_infoframes()
1259 drm_dbg_kms(&dev_priv->drm, "%s DP dual mode adaptor TMDS output\n", in intel_dp_dual_mode_set_tmds_output()
1340 drm_dbg_kms(&i915->drm, "Write An over DDC failed (%d)\n", in intel_hdmi_hdcp_write_an_aksv()
1347 drm_dbg_kms(&i915->drm, "Failed to output aksv (%d)\n", ret); in intel_hdmi_hdcp_write_an_aksv()
1362 drm_dbg_kms(&i915->drm, "Read Bksv over DDC failed (%d)\n", in intel_hdmi_hdcp_read_bksv()
1377 drm_dbg_kms(&i915->drm, "Read bstatus over DDC failed (%d)\n", in intel_hdmi_hdcp_read_bstatus()
[all …]
Dintel_modeset_setup.c60 drm_dbg_kms(&i915->drm, in intel_crtc_disable_noatomic()
78 drm_dbg_kms(&i915->drm, in intel_crtc_disable_noatomic()
186 drm_dbg_kms(&i915->drm, in intel_sanitize_plane_mapping()
323 drm_dbg_kms(&i915->drm, in intel_sanitize_encoder()
331 drm_dbg_kms(&i915->drm, in intel_sanitize_encoder()
344 drm_dbg_kms(&i915->drm, in intel_sanitize_encoder()
402 drm_dbg_kms(&i915->drm, in readout_plane_state()
447 drm_dbg_kms(&i915->drm, in intel_modeset_readout_hw_state()
492 drm_dbg_kms(&i915->drm, in intel_modeset_readout_hw_state()
530 drm_dbg_kms(&i915->drm, in intel_modeset_readout_hw_state()
[all …]
Dintel_vdsc.c609 drm_dbg_kms(&dev_priv->drm, "PPS0 = 0x%08x\n", pps_val); in intel_dsc_pps_configure()
633 drm_dbg_kms(&dev_priv->drm, "PPS1 = 0x%08x\n", pps_val); in intel_dsc_pps_configure()
658 drm_dbg_kms(&dev_priv->drm, "PPS2 = 0x%08x\n", pps_val); in intel_dsc_pps_configure()
683 drm_dbg_kms(&dev_priv->drm, "PPS3 = 0x%08x\n", pps_val); in intel_dsc_pps_configure()
708 drm_dbg_kms(&dev_priv->drm, "PPS4 = 0x%08x\n", pps_val); in intel_dsc_pps_configure()
733 drm_dbg_kms(&dev_priv->drm, "PPS5 = 0x%08x\n", pps_val); in intel_dsc_pps_configure()
760 drm_dbg_kms(&dev_priv->drm, "PPS6 = 0x%08x\n", pps_val); in intel_dsc_pps_configure()
785 drm_dbg_kms(&dev_priv->drm, "PPS7 = 0x%08x\n", pps_val); in intel_dsc_pps_configure()
810 drm_dbg_kms(&dev_priv->drm, "PPS8 = 0x%08x\n", pps_val); in intel_dsc_pps_configure()
835 drm_dbg_kms(&dev_priv->drm, "PPS9 = 0x%08x\n", pps_val); in intel_dsc_pps_configure()
[all …]
Dintel_opregion.c397 drm_dbg_kms(&dev_priv->drm, in intel_opregion_notify_encoder()
471 drm_dbg_kms(&dev_priv->drm, in asle_set_backlight()
489 drm_dbg_kms(&dev_priv->drm, "updating opregion backlight %d/255\n", in asle_set_backlight()
720 drm_dbg_kms(&dev_priv->drm, "%d outputs detected\n", i); in intel_didl_outputs()
861 drm_dbg_kms(&dev_priv->drm, in intel_load_vbt_firmware()
870 drm_dbg_kms(&dev_priv->drm, "Invalid VBT firmware \"%s\"\n", in intel_load_vbt_firmware()
998 drm_dbg_kms(&dev_priv->drm, in intel_opregion_setup()
1004 drm_dbg_kms(&dev_priv->drm, in intel_opregion_setup()
1023 drm_dbg_kms(&dev_priv->drm, in intel_opregion_setup()
1028 drm_dbg_kms(&dev_priv->drm, in intel_opregion_setup()
[all …]
Dintel_pch_refclk.c199 drm_dbg_kms(&dev_priv->drm, in lpt_program_iclkip()
472 drm_dbg_kms(&dev_priv->drm, "SPLL using PCH SSC\n"); in lpt_init_pch_refclk()
477 drm_dbg_kms(&dev_priv->drm, "WRPLL1 using PCH SSC\n"); in lpt_init_pch_refclk()
482 drm_dbg_kms(&dev_priv->drm, "WRPLL2 using PCH SSC\n"); in lpt_init_pch_refclk()
548 drm_dbg_kms(&dev_priv->drm, in ilk_init_pch_refclk()
610 drm_dbg_kms(&dev_priv->drm, "Using SSC on panel\n"); in ilk_init_pch_refclk()
626 drm_dbg_kms(&dev_priv->drm, in ilk_init_pch_refclk()
640 drm_dbg_kms(&dev_priv->drm, "Disabling CPU source output\n"); in ilk_init_pch_refclk()
652 drm_dbg_kms(&dev_priv->drm, "Disabling SSC source\n"); in ilk_init_pch_refclk()
/linux-6.1.9/drivers/gpu/drm/i915/
Dintel_pch.c16 drm_dbg_kms(&dev_priv->drm, "Found Ibex Peak PCH\n"); in intel_pch_type()
20 drm_dbg_kms(&dev_priv->drm, "Found CougarPoint PCH\n"); in intel_pch_type()
25 drm_dbg_kms(&dev_priv->drm, "Found PantherPoint PCH\n"); in intel_pch_type()
31 drm_dbg_kms(&dev_priv->drm, "Found LynxPoint PCH\n"); in intel_pch_type()
38 drm_dbg_kms(&dev_priv->drm, "Found LynxPoint LP PCH\n"); in intel_pch_type()
45 drm_dbg_kms(&dev_priv->drm, "Found WildcatPoint PCH\n"); in intel_pch_type()
53 drm_dbg_kms(&dev_priv->drm, "Found WildcatPoint LP PCH\n"); in intel_pch_type()
61 drm_dbg_kms(&dev_priv->drm, "Found SunrisePoint PCH\n"); in intel_pch_type()
66 drm_dbg_kms(&dev_priv->drm, "Found SunrisePoint LP PCH\n"); in intel_pch_type()
74 drm_dbg_kms(&dev_priv->drm, "Found Kaby Lake PCH (KBP)\n"); in intel_pch_type()
[all …]
Dintel_dram.c138 drm_dbg_kms(&i915->drm, in skl_dram_get_dimm_info()
155 drm_dbg_kms(&i915->drm, "CH%u not populated\n", channel); in skl_dram_get_channel_info()
169 drm_dbg_kms(&i915->drm, "CH%u ranks: %u, 16Gb DIMMs: %s\n", in skl_dram_get_channel_info()
218 drm_dbg_kms(&i915->drm, "Memory configuration is symmetric? %s\n", in skl_dram_get_channels_info()
254 drm_dbg_kms(&i915->drm, "DRAM type: %s\n", in skl_get_dram_info()
369 drm_dbg_kms(&i915->drm, in bxt_get_dram_info()
532 drm_dbg_kms(&i915->drm, "DRAM channels: %u\n", dram_info->num_channels); in intel_dram_detect()
534 drm_dbg_kms(&i915->drm, "Watermark level 0 adjustment needed: %s\n", in intel_dram_detect()
/linux-6.1.9/drivers/gpu/drm/
Ddrm_framebuffer.c90 drm_dbg_kms(fb->dev, "Invalid source coordinates " in drm_framebuffer_check_src_coords()
128 drm_dbg_kms(dev, "bad {bpp:%d, depth:%d}\n", or->bpp, or->depth); in drm_mode_addfb()
180 drm_dbg_kms(dev, "bad framebuffer format %p4cc\n", in framebuffer_check()
186 drm_dbg_kms(dev, "bad framebuffer width %u\n", r->width); in framebuffer_check()
191 drm_dbg_kms(dev, "bad framebuffer height %u\n", r->height); in framebuffer_check()
205 drm_dbg_kms(dev, "Format requires non-linear modifier for plane %d\n", i); in framebuffer_check()
210 drm_dbg_kms(dev, "no buffer object handle for plane %d\n", i); in framebuffer_check()
221 drm_dbg_kms(dev, "bad pitch %u for plane %d\n", r->pitches[i], i); in framebuffer_check()
226 drm_dbg_kms(dev, "bad fb modifier %llu for plane %d\n", in framebuffer_check()
233 drm_dbg_kms(dev, "bad fb modifier %llu for plane %d\n", in framebuffer_check()
[all …]
/linux-6.1.9/drivers/gpu/drm/display/
Ddrm_dp_dual_mode_helper.c228 drm_dbg_kms(dev, "DP dual mode HDMI ID: %*pE (err %zd)\n", in drm_dp_dual_mode_detect()
235 drm_dbg_kms(dev, "DP dual mode adaptor ID: %02x (err %zd)\n", adaptor_id, ret); in drm_dp_dual_mode_detect()
297 drm_dbg_kms(dev, "Failed to query max TMDS clock\n"); in drm_dp_dual_mode_max_tmds_clock()
337 drm_dbg_kms(dev, "Failed to query state of TMDS output buffers\n"); in drm_dp_dual_mode_get_tmds_output()
381 drm_dbg_kms(dev, "Failed to %s TMDS output buffers (%d attempts)\n", in drm_dp_dual_mode_set_tmds_output()
389 drm_dbg_kms(dev, in drm_dp_dual_mode_set_tmds_output()
399 drm_dbg_kms(dev, "I2C write value mismatch during TMDS output buffer %s\n", in drm_dp_dual_mode_set_tmds_output()
471 drm_dbg_kms(dev, "LSPCON read(0x80, 0x41) failed\n"); in drm_lspcon_get_mode()
527 drm_dbg_kms(dev, "LSPCON mode changed to %s\n", in drm_lspcon_set_mode()
Ddrm_dp_helper.c229 drm_dbg_kms(aux->drm_dev, "%s: invalid AUX interval 0x%02x (max 4)\n", in __8b10b_clock_recovery_delay_us()
241 drm_dbg_kms(aux->drm_dev, "%s: invalid AUX interval 0x%02x (max 4)\n", in __8b10b_channel_eq_delay_us()
254 drm_dbg_kms(aux->drm_dev, "%s: invalid AUX interval 0x%02x\n", in __128b132b_channel_eq_delay_us()
329 drm_dbg_kms(aux->drm_dev, "%s: failed rd interval read\n", in __read_delay()
568 drm_dbg_kms(aux->drm_dev, "%s: Too many retries, giving up. First error: %d\n", in drm_dp_dpcd_access()
842 drm_dbg_kms(aux->drm_dev, "%s: Source DUT does not support TEST_EDID_READ\n", in drm_dp_send_real_edid_checksum()
908 drm_dbg_kms(aux->drm_dev, in drm_dp_read_extended_dpcd_caps()
917 drm_dbg_kms(aux->drm_dev, "%s: Base DPCD: %*ph\n", aux->name, DP_RECEIVER_CAP_SIZE, dpcd); in drm_dp_read_extended_dpcd_caps()
952 drm_dbg_kms(aux->drm_dev, "%s: DPCD: %*ph\n", aux->name, DP_RECEIVER_CAP_SIZE, dpcd); in drm_dp_read_dpcd_caps()
1001 drm_dbg_kms(aux->drm_dev, "%s: DPCD DFP: %*ph\n", aux->name, len, downstream_ports); in drm_dp_read_downstream_info()
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