| /linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn301/ |
| D | dcn301_fpu.c | 205 .dram_clock_change_latency_us = 23.84,
299 double dram_clock_change_latency_cached = dml->soc.dram_clock_change_latency_us; in calculate_wm_set_for_vlevel()
307 dml->soc.dram_clock_change_latency_us = table_entry->pstate_latency_us; in calculate_wm_set_for_vlevel()
319 dml->soc.dram_clock_change_latency_us = dram_clock_change_latency_cached; in calculate_wm_set_for_vlevel()
382 if ((int)(dcn3_01_soc.dram_clock_change_latency_us * 1000) in dcn301_update_bw_bounding_box()
385 dcn3_01_soc.dram_clock_change_latency_us = dc->debug.dram_clock_change_latency_ns / 1000.0; in dcn301_update_bw_bounding_box()
405 dcn3_01_soc.dram_clock_change_latency_us = bb_info.dram_clock_change_latency_100ns * 10; in dcn301_fpu_init_soc_bounding_box()
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| /linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| D | dcn31_fpu.c | 457 …context->bw_ctx.dml.soc.dram_clock_change_latency_us = dc->clk_mgr->bw_params->wm_table.entries[WM… in dcn31_update_soc_for_wm_a()
470 …context->bw_ctx.dml.soc.dram_clock_change_latency_us = context->bw_ctx.dml.soc.dummy_pstate_latenc… in dcn315_update_soc_for_wm_a()
472 …context->bw_ctx.dml.soc.dram_clock_change_latency_us = dc->clk_mgr->bw_params->wm_table.entries[WM… in dcn315_update_soc_for_wm_a()
627 if ((int)(dcn3_1_soc.dram_clock_change_latency_us * 1000) in dcn31_update_bw_bounding_box()
630 dcn3_1_soc.dram_clock_change_latency_us = dc->debug.dram_clock_change_latency_ns / 1000; in dcn31_update_bw_bounding_box()
691 if ((int)(dcn3_15_soc.dram_clock_change_latency_us * 1000) in dcn315_update_bw_bounding_box()
694 dcn3_15_soc.dram_clock_change_latency_us = dc->debug.dram_clock_change_latency_ns / 1000; in dcn315_update_bw_bounding_box()
789 if ((int)(dcn3_16_soc.dram_clock_change_latency_us * 1000) in dcn316_update_bw_bounding_box()
792 dcn3_16_soc.dram_clock_change_latency_us = dc->debug.dram_clock_change_latency_ns / 1000; in dcn316_update_bw_bounding_box()
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| /linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| D | dcn30_fpu.c | 167 .dram_clock_change_latency_us = 404,
371 …context->bw_ctx.dml.soc.dram_clock_change_latency_us = dc->clk_mgr->bw_params->wm_table.nv_entries… in dcn30_fpu_update_soc_for_wm_a()
406 …context->bw_ctx.dml.soc.dram_clock_change_latency_us = dc->clk_mgr->bw_params->wm_table.nv_entries… in dcn30_fpu_calculate_wm_and_dlg()
460 …context->bw_ctx.dml.soc.dram_clock_change_latency_us = dc->clk_mgr->bw_params->dummy_pstate_table[… in dcn30_fpu_calculate_wm_and_dlg()
529 context->bw_ctx.dml.soc.dram_clock_change_latency_us = in dcn30_fpu_calculate_wm_and_dlg()
637 context->bw_ctx.dml.soc.dram_clock_change_latency_us = in dcn30_find_dummy_latency_index_for_fw_based_mclk_switch()
665 double pstate_latency_us = base->ctx->dc->dml.soc.dram_clock_change_latency_us; in dcn3_fpu_build_wm_range_table()
734 dcn3_0_soc.dram_clock_change_latency_us = bb_info.dram_clock_change_latency_100ns * 10; in patch_dcn30_soc_bounding_box()
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| D | display_rq_dlg_calc_30.c | 1244 line_wait = dml_max(mode_lib->soc.dram_clock_change_latency_us in dml_rq_dlg_get_dlg_params()
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| /linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn10/ |
| D | dcn10_fpu.c | 120 .dram_clock_change_latency_us = 17.0,
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| /linux-6.1.9/drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_socbb.h | 71 uint32_t dram_clock_change_latency_us; member
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| /linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn321/ |
| D | dcn321_fpu.c | 155 .dram_clock_change_latency_us = 400,
496 if ((int)(dcn3_21_soc.dram_clock_change_latency_us * 1000) in dcn321_update_bw_bounding_box_fpu()
499 dcn3_21_soc.dram_clock_change_latency_us = in dcn321_update_bw_bounding_box_fpu()
523 dcn3_21_soc.dram_clock_change_latency_us = in dcn321_update_bw_bounding_box_fpu()
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| /linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn302/ |
| D | dcn302_fpu.c | 155 .dram_clock_change_latency_us = 404,
345 dcn3_02_soc.dram_clock_change_latency_us = in dcn302_fpu_init_soc_bounding_box()
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| /linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn303/ |
| D | dcn303_fpu.c | 154 .dram_clock_change_latency_us = 404,
352 dcn3_03_soc.dram_clock_change_latency_us = bb_info.dram_clock_change_latency_100ns * 10; in dcn303_fpu_init_soc_bounding_box()
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| /linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
| D | dcn314_fpu.c | 267 if ((int)(dcn3_14_soc.dram_clock_change_latency_us * 1000) in dcn314_update_bw_bounding_box_fpu()
270 dcn3_14_soc.dram_clock_change_latency_us = dc->debug.dram_clock_change_latency_ns / 1000; in dcn314_update_bw_bounding_box_fpu()
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| /linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| D | dcn20_fpu.c | 320 .dram_clock_change_latency_us = 404.0,
431 .dram_clock_change_latency_us = 404.0,
648 .dram_clock_change_latency_us = 23.84,
1842 if ((int)(bb->dram_clock_change_latency_us * 1000) in dcn20_patch_bounding_box()
1845 bb->dram_clock_change_latency_us = in dcn20_patch_bounding_box()
1920 p_state_latency_us = context->bw_ctx.dml.soc.dram_clock_change_latency_us; in dcn20_validate_bandwidth_fp()
1944 …context->bw_ctx.dml.soc.dram_clock_change_latency_us = context->bw_ctx.dml.soc.dummy_pstate_latenc… in dcn20_validate_bandwidth_fp()
1958 context->bw_ctx.dml.soc.dram_clock_change_latency_us = p_state_latency_us; in dcn20_validate_bandwidth_fp()
2044 double dram_clock_change_latency_cached = dml->soc.dram_clock_change_latency_us; in calculate_wm_set_for_vlevel()
2052 dml->soc.dram_clock_change_latency_us = table_entry->pstate_latency_us; in calculate_wm_set_for_vlevel()
[all …]
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| D | display_rq_dlg_calc_20.c | 1093 line_wait = dml_max(mode_lib->soc.dram_clock_change_latency_us in dml20_rq_dlg_get_dlg_params()
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| D | display_rq_dlg_calc_20v2.c | 1094 line_wait = dml_max(mode_lib->soc.dram_clock_change_latency_us in dml20v2_rq_dlg_get_dlg_params()
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| /linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| D | dcn32_fpu.c | 156 .dram_clock_change_latency_us = 400,
166 double pstate_latency_us = clk_mgr->base.ctx->dc->dml.soc.dram_clock_change_latency_us; in dcn32_build_wm_range_table_fpu()
265 context->bw_ctx.dml.soc.dram_clock_change_latency_us = in dcn32_find_dummy_latency_index_for_fw_based_mclk_switch()
1811 context->bw_ctx.dml.soc.dram_clock_change_latency_us = in dcn32_calculate_wm_and_dlg_fpu()
1845 …context->bw_ctx.dml.soc.dram_clock_change_latency_us = dc->clk_mgr->bw_params->wm_table.nv_entries… in dcn32_calculate_wm_and_dlg_fpu()
1879 …context->bw_ctx.dml.soc.dram_clock_change_latency_us = dc->clk_mgr->bw_params->wm_table.nv_entries… in dcn32_calculate_wm_and_dlg_fpu()
1915 context->bw_ctx.dml.soc.dram_clock_change_latency_us = in dcn32_calculate_wm_and_dlg_fpu()
1936 context->bw_ctx.dml.soc.dram_clock_change_latency_us = in dcn32_calculate_wm_and_dlg_fpu()
2014 context->bw_ctx.dml.soc.dram_clock_change_latency_us = in dcn32_calculate_wm_and_dlg_fpu()
2337 if ((int)(dcn3_2_soc.dram_clock_change_latency_us * 1000) in dcn32_update_bw_bounding_box_fpu()
[all …]
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| /linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/ |
| D | display_mode_structs.h | 234 double dram_clock_change_latency_us; member
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| D | dml1_display_rq_dlg_calc.c | 1308 mode_lib->soc.dram_clock_change_latency_us in dml1_rq_dlg_get_dlg_params()
1324 (double) mode_lib->soc.dram_clock_change_latency_us); in dml1_rq_dlg_get_dlg_params()
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| D | display_mode_vba.c | 357 mode_lib->vba.DRAMClockChangeLatency = soc->dram_clock_change_latency_us; in fetch_socbb_params()
358 mode_lib->vba.DummyPStateCheck = soc->dram_clock_change_latency_us == soc->dummy_pstate_latency_us; in fetch_socbb_params()
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| /linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn201/ |
| D | dcn201_resource.c | 228 .dram_clock_change_latency_us = 250.0,
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| /linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/dcn21/ |
| D | display_rq_dlg_calc_21.c | 1141 mode_lib->soc.dram_clock_change_latency_us in dml_rq_dlg_get_dlg_params()
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| /linux-6.1.9/drivers/gpu/drm/amd/display/dc/dml/calcs/ |
| D | dcn_calcs.c | 1715 dc->dml.soc.dram_clock_change_latency_us = dc->dcn_soc->dram_clock_change_latency; in dcn_bw_sync_calcs_and_dml()
|