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Searched refs:dprefclk_khz (Results 1 – 22 of 22) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/
Ddcn201_clk_mgr.c195 clk_mgr->base.dprefclk_khz = 600000; in dcn201_clk_mgr_construct()
198 clk_mgr->base.dprefclk_khz = REG_READ(CLK4_CLK2_CURRENT_CNT); in dcn201_clk_mgr_construct()
199 clk_mgr->base.dprefclk_khz *= 100; in dcn201_clk_mgr_construct()
201 if (clk_mgr->base.dprefclk_khz == 0) in dcn201_clk_mgr_construct()
202 clk_mgr->base.dprefclk_khz = 600000; in dcn201_clk_mgr_construct()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dce120/
Ddce120_clk_mgr.c136 clk_mgr->base.dprefclk_khz = 600000; in dce120_clk_mgr_construct()
143 clk_mgr->base.dprefclk_khz = 625000; in dce121_clk_mgr_construct()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/
Ddcn301_smu.c160 DC_LOG_DEBUG("%s %d\n", __func__, clk_mgr->base.dprefclk_khz / 1000); in dcn301_smu_set_dprefclk()
165 khz_to_mhz_ceil(clk_mgr->base.dprefclk_khz)); in dcn301_smu_set_dprefclk()
Dvg_clk_mgr.c716 clk_mgr->base.base.dprefclk_khz = 600000; in vg_clk_mgr_construct()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/inc/hw/
Dclk_mgr.h240 uint32_t dprefclk_khz; member
305 …int dprefclk_khz; // Used by program pixel clock in clock source funcs, need to figureout where th… member
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
Ddcn31_smu.c178 return clk_mgr->base.dprefclk_khz; in dcn31_smu_set_dprefclk()
183 khz_to_mhz_ceil(clk_mgr->base.dprefclk_khz)); in dcn31_smu_set_dprefclk()
Ddcn31_clk_mgr.c737 clk_mgr->base.base.dprefclk_khz = 600000; in dcn31_clk_mgr_construct()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/
Ddcn314_smu.c193 return clk_mgr->base.dprefclk_khz; in dcn314_smu_set_dprefclk()
198 khz_to_mhz_ceil(clk_mgr->base.dprefclk_khz)); in dcn314_smu_set_dprefclk()
Ddcn314_clk_mgr.c787 clk_mgr->base.base.dprefclk_khz = 600000; in dcn314_clk_mgr_construct()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/
Drv1_clk_mgr_vbios_smu.c156 khz_to_mhz_ceil(clk_mgr->base.dprefclk_khz)); in rv1_vbios_smu_set_dprefclk()
Drv1_clk_mgr.c334 clk_mgr->base.dprefclk_khz = 600000; in rv1_clk_mgr_construct()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/
Ddcn315_clk_mgr.c671 clk_mgr->base.base.dprefclk_khz = 600000; in dcn315_clk_mgr_construct()
672 clk_mgr->base.base.dprefclk_khz = dcn315_smu_get_dpref_clk(&clk_mgr->base); in dcn315_clk_mgr_construct()
673 clk_mgr->base.base.clks.ref_dtbclk_khz = clk_mgr->base.base.dprefclk_khz; in dcn315_clk_mgr_construct()
675 …ks.ref_dtbclk_khz = dce_adjust_dp_ref_freq_for_ss(&clk_mgr->base, clk_mgr->base.base.dprefclk_khz); in dcn315_clk_mgr_construct()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/
Ddcn316_clk_mgr.c689 clk_mgr->base.base.dprefclk_khz = 600000; in dcn316_clk_mgr_construct()
690 clk_mgr->base.base.dprefclk_khz = dcn316_smu_get_dpref_clk(&clk_mgr->base); in dcn316_clk_mgr_construct()
691 clk_mgr->base.base.clks.ref_dtbclk_khz = clk_mgr->base.base.dprefclk_khz; in dcn316_clk_mgr_construct()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/
Drn_clk_mgr_vbios_smu.c172 khz_to_mhz_ceil(clk_mgr->base.dprefclk_khz)); in rn_vbios_smu_set_dprefclk()
Drn_clk_mgr.c771 clk_mgr->base.dprefclk_khz = 600000; in rn_clk_mgr_construct()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dce/
Ddce_clk_mgr.c178 return clk_mgr_adjust_dp_ref_freq_for_ss(clk_mgr_dce, clk_mgr_dce->dprefclk_khz); in dce12_get_dp_ref_freq_khz()
934 clk_mgr_dce->dprefclk_khz = 600000; in dce120_clk_mgr_create()
955 clk_mgr_dce->dprefclk_khz = 625000; in dce121_clk_mgr_create()
Ddce_clock_source.c982 unsigned int dp_dto_ref_khz = clock_source->ctx->dc->clk_mgr->dprefclk_khz; in dcn31_program_pix_clk()
1141 clock_source->ctx->dc->clk_mgr->dprefclk_khz*10, in get_pixel_clk_frequency_100hz()
1226 clock_source->ctx->dc->clk_mgr->dprefclk_khz*1000); in dcn20_program_pix_clk()
1262 unsigned int dp_dto_ref_khz = clock_source->ctx->dc->clk_mgr->dprefclk_khz; in dcn3_program_pix_clk()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/
Ddcn30_clk_mgr.c540 clk_mgr->base.dprefclk_khz = 730000; // 700 MHz planned if VCO is 3.85 GHz, will be retrieved in dcn3_clk_mgr_construct()
561 clk_mgr->base.dprefclk_khz = s.dprefclk * 1000; in dcn3_clk_mgr_construct()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/
Ddcn20_clk_mgr.c548 clk_mgr->base.dprefclk_khz = 700000; // 700 MHz planned if VCO is 3.85 GHz, will be retrieved in dcn20_clk_mgr_construct()
583 clk_mgr->base.dprefclk_khz = (DENTIST_DIVIDER_RANGE_SCALE_FACTOR in dcn20_clk_mgr_construct()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/
Ddce_clk_mgr.c159 return dce_adjust_dp_ref_freq_for_ss(clk_mgr_dce, clk_mgr_base->dprefclk_khz); in dce12_get_dp_ref_freq_khz()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/
Ddcn32_clk_mgr.c783 clk_mgr->base.dprefclk_khz = 716666; in dcn32_clk_mgr_construct()
805 clk_mgr->base.dprefclk_khz = clk_mgr->base.boot_snapshot.dprefclk; in dcn32_clk_mgr_construct()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_hw_sequencer.c2128 dc->res_pool->dp_clock_source->ctx->dc->clk_mgr->dprefclk_khz*10; in dcn10_align_pixel_clocks()