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Searched refs:dpm_level (Results 1 – 23 of 23) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/pm/swsmu/smu13/
Dsmu_v13_0_5_ppt.c511 if (smu_dpm->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) in smu_v13_0_5_od_edit_dpm_table()
647 uint32_t dpm_level, in smu_v13_0_5_get_dpm_freq_by_index() argument
657 if (dpm_level >= clk_table->NumSocClkLevelsEnabled) in smu_v13_0_5_get_dpm_freq_by_index()
659 *freq = clk_table->SocClocks[dpm_level]; in smu_v13_0_5_get_dpm_freq_by_index()
662 if (dpm_level >= clk_table->VcnClkLevelsEnabled) in smu_v13_0_5_get_dpm_freq_by_index()
664 *freq = clk_table->VClocks[dpm_level]; in smu_v13_0_5_get_dpm_freq_by_index()
667 if (dpm_level >= clk_table->VcnClkLevelsEnabled) in smu_v13_0_5_get_dpm_freq_by_index()
669 *freq = clk_table->DClocks[dpm_level]; in smu_v13_0_5_get_dpm_freq_by_index()
673 if (dpm_level >= clk_table->NumDfPstatesEnabled) in smu_v13_0_5_get_dpm_freq_by_index()
675 *freq = clk_table->DfPstateTable[dpm_level].MemClk; in smu_v13_0_5_get_dpm_freq_by_index()
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Dsmu_v13_0_4_ppt.c407 uint32_t dpm_level, in smu_v13_0_4_get_dpm_freq_by_index() argument
417 if (dpm_level >= clk_table->NumSocClkLevelsEnabled) in smu_v13_0_4_get_dpm_freq_by_index()
419 *freq = clk_table->SocClocks[dpm_level]; in smu_v13_0_4_get_dpm_freq_by_index()
422 if (dpm_level >= clk_table->VcnClkLevelsEnabled) in smu_v13_0_4_get_dpm_freq_by_index()
424 *freq = clk_table->VClocks[dpm_level]; in smu_v13_0_4_get_dpm_freq_by_index()
427 if (dpm_level >= clk_table->VcnClkLevelsEnabled) in smu_v13_0_4_get_dpm_freq_by_index()
429 *freq = clk_table->DClocks[dpm_level]; in smu_v13_0_4_get_dpm_freq_by_index()
433 if (dpm_level >= clk_table->NumDfPstatesEnabled) in smu_v13_0_4_get_dpm_freq_by_index()
435 *freq = clk_table->DfPstateTable[dpm_level].MemClk; in smu_v13_0_4_get_dpm_freq_by_index()
438 if (dpm_level >= clk_table->NumDfPstatesEnabled) in smu_v13_0_4_get_dpm_freq_by_index()
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Dyellow_carp_ppt.c634 if (smu_dpm->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) in yellow_carp_od_edit_dpm_table()
773 uint32_t dpm_level, in yellow_carp_get_dpm_freq_by_index() argument
783 if (dpm_level >= clk_table->NumSocClkLevelsEnabled) in yellow_carp_get_dpm_freq_by_index()
785 *freq = clk_table->SocClocks[dpm_level]; in yellow_carp_get_dpm_freq_by_index()
788 if (dpm_level >= clk_table->VcnClkLevelsEnabled) in yellow_carp_get_dpm_freq_by_index()
790 *freq = clk_table->VClocks[dpm_level]; in yellow_carp_get_dpm_freq_by_index()
793 if (dpm_level >= clk_table->VcnClkLevelsEnabled) in yellow_carp_get_dpm_freq_by_index()
795 *freq = clk_table->DClocks[dpm_level]; in yellow_carp_get_dpm_freq_by_index()
799 if (dpm_level >= clk_table->NumDfPstatesEnabled) in yellow_carp_get_dpm_freq_by_index()
801 *freq = clk_table->DfPstateTable[dpm_level].MemClk; in yellow_carp_get_dpm_freq_by_index()
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Daldebaran_ppt.c1281 if ((smu_dpm->dpm_level == AMD_DPM_FORCED_LEVEL_PERF_DETERMINISM) && in aldebaran_set_performance_level()
1321 if ((smu_dpm->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) in aldebaran_set_soft_freq_limited_range()
1322 && (smu_dpm->dpm_level != AMD_DPM_FORCED_LEVEL_PERF_DETERMINISM)) in aldebaran_set_soft_freq_limited_range()
1325 if (smu_dpm->dpm_level == AMD_DPM_FORCED_LEVEL_MANUAL) { in aldebaran_set_soft_freq_limited_range()
1346 if (smu_dpm->dpm_level == AMD_DPM_FORCED_LEVEL_PERF_DETERMINISM) { in aldebaran_set_soft_freq_limited_range()
1387 if ((smu_dpm->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) in aldebaran_usr_edit_dpm_table()
1388 && (smu_dpm->dpm_level != AMD_DPM_FORCED_LEVEL_PERF_DETERMINISM)) in aldebaran_usr_edit_dpm_table()
Dsmu_v13_0.c2360 if (smu_dpm->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) in smu_v13_0_od_edit_dpm_table()
/linux-6.1.9/drivers/gpu/drm/amd/pm/swsmu/smu12/
Drenoir_ppt.c203 uint32_t dpm_level, uint32_t *freq) in renoir_get_dpm_clk_limited() argument
212 if (dpm_level >= NUM_SOCCLK_DPM_LEVELS) in renoir_get_dpm_clk_limited()
214 *freq = clk_table->SocClocks[dpm_level].Freq; in renoir_get_dpm_clk_limited()
218 if (dpm_level >= NUM_FCLK_DPM_LEVELS) in renoir_get_dpm_clk_limited()
220 *freq = clk_table->FClocks[dpm_level].Freq; in renoir_get_dpm_clk_limited()
223 if (dpm_level >= NUM_DCFCLK_DPM_LEVELS) in renoir_get_dpm_clk_limited()
225 *freq = clk_table->DcfClocks[dpm_level].Freq; in renoir_get_dpm_clk_limited()
228 if (dpm_level >= NUM_FCLK_DPM_LEVELS) in renoir_get_dpm_clk_limited()
230 *freq = clk_table->FClocks[dpm_level].Freq; in renoir_get_dpm_clk_limited()
233 if (dpm_level >= NUM_VCN_DPM_LEVELS) in renoir_get_dpm_clk_limited()
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/
Ddcn30_clk_mgr_smu_msg.c259 … dcn30_smu_get_dpm_freq_by_index(struct clk_mgr_internal *clk_mgr, uint32_t clk, uint8_t dpm_level) in dcn30_smu_get_dpm_freq_by_index() argument
264 uint32_t param = (clk << 16) | dpm_level; in dcn30_smu_get_dpm_freq_by_index()
266 smu_print("SMU Get dpm freq by index: clk = %d, dpm_level = %d\n", clk, dpm_level); in dcn30_smu_get_dpm_freq_by_index()
Ddcn30_clk_mgr_smu_msg.h43 …dcn30_smu_get_dpm_freq_by_index(struct clk_mgr_internal *clk_mgr, uint32_t clk, uint8_t dpm_level);
/linux-6.1.9/drivers/gpu/drm/amd/pm/swsmu/smu11/
Dvangogh_ppt.c535 uint32_t dpm_level, uint32_t *freq) in vangogh_get_dpm_clk_limited() argument
544 if (dpm_level >= clk_table->NumSocClkLevelsEnabled) in vangogh_get_dpm_clk_limited()
546 *freq = clk_table->SocClocks[dpm_level]; in vangogh_get_dpm_clk_limited()
549 if (dpm_level >= clk_table->VcnClkLevelsEnabled) in vangogh_get_dpm_clk_limited()
551 *freq = clk_table->VcnClocks[dpm_level].vclk; in vangogh_get_dpm_clk_limited()
554 if (dpm_level >= clk_table->VcnClkLevelsEnabled) in vangogh_get_dpm_clk_limited()
556 *freq = clk_table->VcnClocks[dpm_level].dclk; in vangogh_get_dpm_clk_limited()
560 if (dpm_level >= clk_table->NumDfPstatesEnabled) in vangogh_get_dpm_clk_limited()
562 *freq = clk_table->DfPstateTable[dpm_level].memclk; in vangogh_get_dpm_clk_limited()
566 if (dpm_level >= clk_table->NumDfPstatesEnabled) in vangogh_get_dpm_clk_limited()
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/linux-6.1.9/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dsmu_helper.c356 dpm_table->dpm_level[i].enabled = false; in phm_reset_single_dpm_table()
367 dpm_table->dpm_level[index].value = pcie_gen; in phm_setup_pcie_table_entry()
368 dpm_table->dpm_level[index].param1 = pcie_lanes; in phm_setup_pcie_table_entry()
369 dpm_table->dpm_level[index].enabled = 1; in phm_setup_pcie_table_entry()
380 if (dpm_table->dpm_level[i - 1].enabled) in phm_get_dpm_level_enable_mask_value()
451 if (value == dpm_table->dpm_level[i].value) { in phm_find_boot_level()
Dpp_psm.c292 hwmgr->dpm_level = hwmgr->request_dpm_level; in psm_adjust_power_state_dynamic()
294 if (hwmgr->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) { in psm_adjust_power_state_dynamic()
Dvega12_hwmgr.c2353 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_MIN_SCLK) { in vega12_apply_clocks_adjust_rules()
2358 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega12_apply_clocks_adjust_rules()
2377 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_MIN_MCLK) { in vega12_apply_clocks_adjust_rules()
2382 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega12_apply_clocks_adjust_rules()
2421 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega12_apply_clocks_adjust_rules()
2440 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega12_apply_clocks_adjust_rules()
2459 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega12_apply_clocks_adjust_rules()
2478 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega12_apply_clocks_adjust_rules()
Dppatomctrl.h322 uint32_t sclk, uint16_t virtual_voltage_Id, uint16_t *voltage, uint16_t dpm_level, bool debug);
Dvega20_hwmgr.c3754 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_MIN_SCLK) { in vega20_apply_clocks_adjust_rules()
3759 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega20_apply_clocks_adjust_rules()
3778 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_MIN_MCLK) { in vega20_apply_clocks_adjust_rules()
3783 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega20_apply_clocks_adjust_rules()
3838 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega20_apply_clocks_adjust_rules()
3857 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega20_apply_clocks_adjust_rules()
3876 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega20_apply_clocks_adjust_rules()
3895 if (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK) { in vega20_apply_clocks_adjust_rules()
Dhwmgr.c87 hwmgr->dpm_level = AMD_DPM_FORCED_LEVEL_AUTO; in hwmgr_early_init()
Dppatomctrl.c685 uint16_t dpm_level, in atomctrl_calculate_voltage_evv_on_sclk() argument
734 switch (dpm_level) { in atomctrl_calculate_voltage_evv_on_sclk()
Dvega10_hwmgr.c4317 …if (level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK && hwmgr->dpm_level != AMD_DPM_FORCED_LEVEL_PROFILE… in vega10_dpm_force_dpm_level()
4319 …else if (level != AMD_DPM_FORCED_LEVEL_PROFILE_PEAK && hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PR… in vega10_dpm_force_dpm_level()
4653 (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK)) in vega10_emit_clock_levels()
4796 (hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK)) in vega10_print_clock_levels()
Dsmu7_hwmgr.c3229 …if (level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK && hwmgr->dpm_level != AMD_DPM_FORCED_LEVEL_PROFILE… in smu7_force_dpm_level()
3231 …else if (level != AMD_DPM_FORCED_LEVEL_PROFILE_PEAK && hwmgr->dpm_level == AMD_DPM_FORCED_LEVEL_PR… in smu7_force_dpm_level()
/linux-6.1.9/drivers/gpu/drm/amd/pm/swsmu/
Damdgpu_smu.c369 if (smu_dpm_ctx->dpm_level == AMD_DPM_FORCED_LEVEL_MANUAL) { in smu_restore_dpm_user_profile()
741 smu->smu_dpm.dpm_level, in smu_late_init()
1067 smu->smu_dpm.dpm_level = AMD_DPM_FORCED_LEVEL_AUTO; in smu_sw_init()
1720 if (!(smu_dpm_ctx->dpm_level & profile_mode_mask)) { in smu_enable_umd_pstate()
1723 smu_dpm_ctx->saved_dpm_level = smu_dpm_ctx->dpm_level; in smu_enable_umd_pstate()
1787 if (smu_dpm_ctx->dpm_level != level) { in smu_adjust_power_state_dynamic()
1795 smu_dpm_ctx->dpm_level = level; in smu_adjust_power_state_dynamic()
1798 if (smu_dpm_ctx->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL && in smu_adjust_power_state_dynamic()
1799 smu_dpm_ctx->dpm_level != AMD_DPM_FORCED_LEVEL_PERF_DETERMINISM) { in smu_adjust_power_state_dynamic()
1845 return smu_handle_task(smu, smu_dpm->dpm_level, task_id); in smu_handle_dpm_task()
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/linux-6.1.9/drivers/gpu/drm/amd/pm/powerplay/
Damd_powerplay.c317 if (!(hwmgr->dpm_level & profile_mode_mask)) { in pp_dpm_en_umd_pstate()
320 hwmgr->saved_dpm_level = hwmgr->dpm_level; in pp_dpm_en_umd_pstate()
341 if (level == hwmgr->dpm_level) in pp_dpm_force_performance_level()
359 return hwmgr->dpm_level; in pp_dpm_get_performance_level()
666 if (hwmgr->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) { in pp_dpm_force_clock_level()
820 if (hwmgr->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) { in pp_set_power_profile_mode()
909 if (hwmgr->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL) in pp_dpm_switch_power_profile()
/linux-6.1.9/drivers/gpu/drm/amd/pm/powerplay/inc/
Dhwmgr.h63 struct vi_dpm_level dpm_level[]; member
766 enum amd_dpm_forced_level dpm_level; member
/linux-6.1.9/drivers/gpu/drm/amd/pm/swsmu/inc/
Damdgpu_smu.h370 enum amd_dpm_forced_level dpm_level; member
/linux-6.1.9/drivers/gpu/drm/amd/pm/powerplay/smumgr/
Dci_smumgr.c2884 if (hwmgr->dpm_level & profile_mode_mask || !PP_CAP(PHM_PlatformCaps_UVDDPM)) in ci_update_uvd_smc_table()
2916 if (hwmgr->dpm_level & profile_mode_mask || !PP_CAP(PHM_PlatformCaps_VCEDPM)) in ci_update_vce_smc_table()