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Searched refs:dpcd_lane_adjust (Results 1 – 2 of 2) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/amd/display/dc/core/
Ddc_link_dpia.c305 union lane_adjust dpcd_lane_adjust[LANE_COUNT_DP_MAX] = {0}; in dpia_training_cr_non_transparent() local
386 dpcd_lane_adjust, in dpia_training_cr_non_transparent()
409 dpcd_lane_adjust[0].bits.VOLTAGE_SWING_LANE) in dpia_training_cr_non_transparent()
411 dpcd_lane_adjust[0].bits.PRE_EMPHASIS_LANE)) in dpia_training_cr_non_transparent()
417 dp_decide_lane_settings(lt_settings, dpcd_lane_adjust, in dpia_training_cr_non_transparent()
461 union lane_adjust dpcd_lane_adjust[LANE_COUNT_DP_MAX] = {0}; in dpia_training_cr_transparent() local
492 dpcd_lane_adjust, in dpia_training_cr_transparent()
515 dpcd_lane_adjust[0].bits.VOLTAGE_SWING_LANE) in dpia_training_cr_transparent()
517 dpcd_lane_adjust[0].bits.PRE_EMPHASIS_LANE)) in dpia_training_cr_transparent()
523 dp_decide_lane_settings(lt_settings, dpcd_lane_adjust, in dpia_training_cr_transparent()
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Ddc_link_dp.c334 union dpcd_training_lane dpcd_lane_adjust[LANE_COUNT_DP_MAX]) in dp_fixed_vs_pe_read_lane_adjust()
376 dpcd_lane_adjust[lane].bits.VOLTAGE_SWING_SET = (dprx_vs >> (2 * lane)) & 0x3; in dp_fixed_vs_pe_read_lane_adjust()
377 dpcd_lane_adjust[lane].bits.PRE_EMPHASIS_SET = (dprx_pe >> (2 * lane)) & 0x3; in dp_fixed_vs_pe_read_lane_adjust()
383 const union dpcd_training_lane dpcd_lane_adjust[LANE_COUNT_DP_MAX], in dp_fixed_vs_pe_set_retimer_lane_settings()
401 dpcd_lane_adjust[lane].bits.VOLTAGE_SWING_SET << (2 * lane); in dp_fixed_vs_pe_set_retimer_lane_settings()
403 dpcd_lane_adjust[lane].bits.PRE_EMPHASIS_SET << (2 * lane); in dp_fixed_vs_pe_set_retimer_lane_settings()
1036 union lane_adjust dpcd_lane_adjust[LANE_COUNT_DP_MAX] = {0}; in perform_post_lt_adj_req_sequence() local
1053 dpcd_lane_adjust, in perform_post_lt_adj_req_sequence()
1072 dpcd_lane_adjust[lane].bits.VOLTAGE_SWING_LANE || in perform_post_lt_adj_req_sequence()
1074 dpcd_lane_adjust[lane].bits.PRE_EMPHASIS_LANE) { in perform_post_lt_adj_req_sequence()
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