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Searched refs:dmub (Results 1 – 25 of 32) sorted by relevance

12

/linux-6.1.9/drivers/gpu/drm/amd/display/dmub/src/
Ddmub_srv.c151 static bool dmub_srv_hw_setup(struct dmub_srv *dmub, enum dmub_asic asic) in dmub_srv_hw_setup() argument
153 struct dmub_srv_hw_funcs *funcs = &dmub->hw_funcs; in dmub_srv_hw_setup()
162 dmub->regs = &dmub_srv_dcn20_regs; in dmub_srv_hw_setup()
194 dmub->regs = &dmub_srv_dcn21_regs; in dmub_srv_hw_setup()
199 dmub->regs = &dmub_srv_dcn30_regs; in dmub_srv_hw_setup()
205 dmub->regs = &dmub_srv_dcn301_regs; in dmub_srv_hw_setup()
211 dmub->regs = &dmub_srv_dcn302_regs; in dmub_srv_hw_setup()
217 dmub->regs = &dmub_srv_dcn303_regs; in dmub_srv_hw_setup()
230 dmub->regs_dcn31 = &dmub_srv_dcn315_regs; in dmub_srv_hw_setup()
232 dmub->regs_dcn31 = &dmub_srv_dcn316_regs; in dmub_srv_hw_setup()
[all …]
Ddmub_dcn20.c36 #define CTX dmub
37 #define REGS dmub->regs
60 static void dmub_dcn20_get_fb_base_offset(struct dmub_srv *dmub, in dmub_dcn20_get_fb_base_offset() argument
66 if (dmub->fb_base || dmub->fb_offset) { in dmub_dcn20_get_fb_base_offset()
67 *fb_base = dmub->fb_base; in dmub_dcn20_get_fb_base_offset()
68 *fb_offset = dmub->fb_offset; in dmub_dcn20_get_fb_base_offset()
87 bool dmub_dcn20_use_cached_inbox(struct dmub_srv *dmub) in dmub_dcn20_use_cached_inbox() argument
90 return !(dmub->fw_version >= DMUB_FW_VERSION(1, 0, 0) && in dmub_dcn20_use_cached_inbox()
91 dmub->fw_version <= DMUB_FW_VERSION(1, 10, 0)); in dmub_dcn20_use_cached_inbox()
94 void dmub_dcn20_reset(struct dmub_srv *dmub) in dmub_dcn20_reset() argument
[all …]
Ddmub_dcn32.c36 #define CTX dmub
37 #define REGS dmub->regs_dcn32
57 static void dmub_dcn32_get_fb_base_offset(struct dmub_srv *dmub, in dmub_dcn32_get_fb_base_offset() argument
63 if (dmub->fb_base || dmub->fb_offset) { in dmub_dcn32_get_fb_base_offset()
64 *fb_base = dmub->fb_base; in dmub_dcn32_get_fb_base_offset()
65 *fb_offset = dmub->fb_offset; in dmub_dcn32_get_fb_base_offset()
84 void dmub_dcn32_reset(struct dmub_srv *dmub) in dmub_dcn32_reset() argument
97 dmub->hw_funcs.set_gpint(dmub, cmd); in dmub_dcn32_reset()
109 if (dmub->hw_funcs.is_gpint_acked(dmub, cmd)) in dmub_dcn32_reset()
114 scratch = dmub->hw_funcs.get_gpint_response(dmub); in dmub_dcn32_reset()
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Ddmub_dcn31.c35 #define CTX dmub
36 #define REGS dmub->regs_dcn31
56 static void dmub_dcn31_get_fb_base_offset(struct dmub_srv *dmub, in dmub_dcn31_get_fb_base_offset() argument
62 if (dmub->fb_base || dmub->fb_offset) { in dmub_dcn31_get_fb_base_offset()
63 *fb_base = dmub->fb_base; in dmub_dcn31_get_fb_base_offset()
64 *fb_offset = dmub->fb_offset; in dmub_dcn31_get_fb_base_offset()
83 void dmub_dcn31_reset(struct dmub_srv *dmub) in dmub_dcn31_reset() argument
96 dmub->hw_funcs.set_gpint(dmub, cmd); in dmub_dcn31_reset()
104 if (dmub->hw_funcs.is_gpint_acked(dmub, cmd)) in dmub_dcn31_reset()
111 scratch = dmub->hw_funcs.get_gpint_response(dmub); in dmub_dcn31_reset()
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Ddmub_dcn32.h187 void dmub_dcn32_reset(struct dmub_srv *dmub);
189 void dmub_dcn32_reset_release(struct dmub_srv *dmub);
191 void dmub_dcn32_backdoor_load(struct dmub_srv *dmub,
195 void dmub_dcn32_backdoor_load_zfb_mode(struct dmub_srv *dmub,
199 void dmub_dcn32_setup_windows(struct dmub_srv *dmub,
206 void dmub_dcn32_setup_mailbox(struct dmub_srv *dmub,
209 uint32_t dmub_dcn32_get_inbox1_rptr(struct dmub_srv *dmub);
211 void dmub_dcn32_set_inbox1_wptr(struct dmub_srv *dmub, uint32_t wptr_offset);
213 void dmub_dcn32_setup_out_mailbox(struct dmub_srv *dmub,
216 uint32_t dmub_dcn32_get_outbox1_wptr(struct dmub_srv *dmub);
[all …]
Ddmub_dcn20.h185 void dmub_dcn20_init(struct dmub_srv *dmub);
187 void dmub_dcn20_reset(struct dmub_srv *dmub);
189 void dmub_dcn20_reset_release(struct dmub_srv *dmub);
191 void dmub_dcn20_backdoor_load(struct dmub_srv *dmub,
195 void dmub_dcn20_setup_windows(struct dmub_srv *dmub,
202 void dmub_dcn20_setup_mailbox(struct dmub_srv *dmub,
205 uint32_t dmub_dcn20_get_inbox1_rptr(struct dmub_srv *dmub);
207 void dmub_dcn20_set_inbox1_wptr(struct dmub_srv *dmub, uint32_t wptr_offset);
209 void dmub_dcn20_setup_out_mailbox(struct dmub_srv *dmub,
212 uint32_t dmub_dcn20_get_outbox1_wptr(struct dmub_srv *dmub);
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Ddmub_dcn31.h187 void dmub_dcn31_init(struct dmub_srv *dmub);
189 void dmub_dcn31_reset(struct dmub_srv *dmub);
191 void dmub_dcn31_reset_release(struct dmub_srv *dmub);
193 void dmub_dcn31_backdoor_load(struct dmub_srv *dmub,
197 void dmub_dcn31_setup_windows(struct dmub_srv *dmub,
204 void dmub_dcn31_setup_mailbox(struct dmub_srv *dmub,
207 uint32_t dmub_dcn31_get_inbox1_rptr(struct dmub_srv *dmub);
209 void dmub_dcn31_set_inbox1_wptr(struct dmub_srv *dmub, uint32_t wptr_offset);
211 void dmub_dcn31_setup_out_mailbox(struct dmub_srv *dmub,
214 uint32_t dmub_dcn31_get_outbox1_wptr(struct dmub_srv *dmub);
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Ddmub_srv_stat.c46 enum dmub_status dmub_srv_stat_get_notification(struct dmub_srv *dmub, in dmub_srv_stat_get_notification() argument
56 if (!dmub->hw_init) { in dmub_srv_stat_get_notification()
63 dmub->outbox1_rb.wrpt = dmub->hw_funcs.get_outbox1_wptr(dmub); in dmub_srv_stat_get_notification()
65 if (!dmub_rb_out_front(&dmub->outbox1_rb, &cmd)) { in dmub_srv_stat_get_notification()
101 dmub_rb_pop_front(&dmub->outbox1_rb); in dmub_srv_stat_get_notification()
102 dmub->hw_funcs.set_outbox1_rptr(dmub, dmub->outbox1_rb.rptr); in dmub_srv_stat_get_notification()
108 if (dmub_rb_empty(&dmub->outbox1_rb)) in dmub_srv_stat_get_notification()
Ddmub_dcn30.c36 #define CTX dmub
37 #define REGS dmub->regs
60 static void dmub_dcn30_get_fb_base_offset(struct dmub_srv *dmub, in dmub_dcn30_get_fb_base_offset() argument
66 if (dmub->fb_base || dmub->fb_offset) { in dmub_dcn30_get_fb_base_offset()
67 *fb_base = dmub->fb_base; in dmub_dcn30_get_fb_base_offset()
68 *fb_offset = dmub->fb_offset; in dmub_dcn30_get_fb_base_offset()
87 void dmub_dcn30_backdoor_load(struct dmub_srv *dmub, in dmub_dcn30_backdoor_load() argument
94 dmub_dcn30_get_fb_base_offset(dmub, &fb_base, &fb_offset); in dmub_dcn30_backdoor_load()
122 void dmub_dcn30_setup_windows(struct dmub_srv *dmub, in dmub_dcn30_setup_windows() argument
161 if (dmub_dcn20_use_cached_inbox(dmub)) { in dmub_dcn30_setup_windows()
Ddmub_dcn21.c35 #define CTX dmub
36 #define REGS dmub->regs
59 bool dmub_dcn21_is_phy_init(struct dmub_srv *dmub) in dmub_dcn21_is_phy_init() argument
Ddmub_dcn30.h37 void dmub_dcn30_backdoor_load(struct dmub_srv *dmub,
41 void dmub_dcn30_setup_windows(struct dmub_srv *dmub,
Ddmub_dcn301.c35 #define CTX dmub
36 #define REGS dmub->regs
Ddmub_dcn302.c35 #define CTX dmub
36 #define REGS dmub->regs
Ddmub_dcn303.c17 #define CTX dmub
18 #define REGS dmub->regs
Ddmub_dcn315.c41 #define CTX dmub
42 #define REGS dmub->regs_dcn31
Ddmub_dcn316.c41 #define CTX dmub
42 #define REGS dmub->regs_dcn31
/linux-6.1.9/drivers/gpu/drm/amd/display/dmub/
Ddmub_srv.h306 void (*init)(struct dmub_srv *dmub);
308 void (*reset)(struct dmub_srv *dmub);
310 void (*reset_release)(struct dmub_srv *dmub);
312 void (*backdoor_load)(struct dmub_srv *dmub,
316 void (*backdoor_load_zfb_mode)(struct dmub_srv *dmub,
319 void (*setup_windows)(struct dmub_srv *dmub,
326 void (*setup_mailbox)(struct dmub_srv *dmub,
329 uint32_t (*get_inbox1_rptr)(struct dmub_srv *dmub);
331 void (*set_inbox1_wptr)(struct dmub_srv *dmub, uint32_t wptr_offset);
333 void (*setup_out_mailbox)(struct dmub_srv *dmub,
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/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dce/
Ddmub_psr.h38 bool (*psr_copy_settings)(struct dmub_psr *dmub, struct dc_link *link,
40 void (*psr_enable)(struct dmub_psr *dmub, bool enable, bool wait,
42 void (*psr_get_state)(struct dmub_psr *dmub, enum dc_psr_state *dc_psr_state,
44 void (*psr_set_level)(struct dmub_psr *dmub, uint16_t psr_level,
46 void (*psr_force_static)(struct dmub_psr *dmub, uint8_t panel_inst);
47 void (*psr_get_residency)(struct dmub_psr *dmub, uint32_t *residency,
49 void (*psr_set_sink_vtotal_in_psr_active)(struct dmub_psr *dmub,
51 void (*psr_set_power_opt)(struct dmub_psr *dmub, unsigned int power_opt, uint8_t panel_inst);
55 void dmub_psr_destroy(struct dmub_psr **dmub);
Ddmub_psr.c100 static void dmub_psr_get_state(struct dmub_psr *dmub, enum dc_psr_state *state, uint8_t panel_inst) in dmub_psr_get_state() argument
102 struct dmub_srv *srv = dmub->ctx->dmub_srv->dmub; in dmub_psr_get_state()
137 static bool dmub_psr_set_version(struct dmub_psr *dmub, struct dc_stream_state *stream, uint8_t pan… in dmub_psr_set_version() argument
140 struct dc_context *dc = dmub->ctx; in dmub_psr_set_version()
178 static void dmub_psr_enable(struct dmub_psr *dmub, bool enable, bool wait, uint8_t panel_inst) in dmub_psr_enable() argument
181 struct dc_context *dc = dmub->ctx; in dmub_psr_enable()
208 dmub_psr_get_state(dmub, &state, panel_inst); in dmub_psr_enable()
230 static void dmub_psr_set_level(struct dmub_psr *dmub, uint16_t psr_level, uint8_t panel_inst) in dmub_psr_set_level() argument
234 struct dc_context *dc = dmub->ctx; in dmub_psr_set_level()
236 dmub_psr_get_state(dmub, &state, panel_inst); in dmub_psr_set_level()
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Ddmub_abm.c183 dmub_flush_buffer_mem(&dc->dmub_srv->dmub->scratch_mem_fb); in dmub_abm_init_config()
186 memcpy(dc->dmub_srv->dmub->scratch_mem_fb.cpu_addr, (void *)src, bytes); in dmub_abm_init_config()
192 …cmd.abm_init_config.abm_init_config_data.src.quad_part = dc->dmub_srv->dmub->scratch_mem_fb.gpu_ad… in dmub_abm_init_config()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/
Ddc_dmub_srv.c39 struct dmub_srv *dmub) in dc_dmub_srv_construct() argument
41 dc_srv->dmub = dmub; in dc_dmub_srv_construct()
45 struct dc_dmub_srv *dc_dmub_srv_create(struct dc *dc, struct dmub_srv *dmub) in dc_dmub_srv_create() argument
55 dc_dmub_srv_construct(dc_srv, dc, dmub); in dc_dmub_srv_create()
71 struct dmub_srv *dmub = dc_dmub_srv->dmub; in dc_dmub_srv_cmd_queue() local
75 status = dmub_srv_cmd_queue(dmub, cmd); in dc_dmub_srv_cmd_queue()
87 status = dmub_srv_cmd_queue(dmub, cmd); in dc_dmub_srv_cmd_queue()
98 struct dmub_srv *dmub = dc_dmub_srv->dmub; in dc_dmub_srv_cmd_execute() local
102 status = dmub_srv_cmd_execute(dmub); in dc_dmub_srv_cmd_execute()
111 struct dmub_srv *dmub = dc_dmub_srv->dmub; in dc_dmub_srv_wait_idle() local
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Ddc_dmub_srv.h48 struct dmub_srv *dmub; member
80 void dc_dmub_srv_query_caps_cmd(struct dmub_srv *dmub);
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/core/
Ddc_stat.c59 struct dmub_srv *dmub = dc->ctx->dmub_srv->dmub; in dc_stat_get_dmub_notification() local
62 status = dmub_srv_stat_get_notification(dmub, notify); in dc_stat_get_dmub_notification()
91 struct dmub_srv *dmub = dc->ctx->dmub_srv->dmub; in dc_stat_get_dmub_dataout() local
94 status = dmub_srv_get_gpint_dataout(dmub, dataout); in dc_stat_get_dmub_dataout()
/linux-6.1.9/drivers/gpu/drm/amd/display/
DMakefile37 subdir-ccflags-y += -I$(FULL_AMD_DISPLAY_PATH)/dmub/inc
46 DAL_LIBS = amdgpu_dm dc modules/freesync modules/color modules/info_packet modules/power dmub/src
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn31/
Ddcn31_dio_link_encoder.c112 !(dc_dmub_srv->dmub->fw_version >= DMUB_FW_VERSION(4, 0, 0) && in has_query_dp_alt()
113 dc_dmub_srv->dmub->fw_version <= DMUB_FW_VERSION(4, 0, 10)); in has_query_dp_alt()
428 struct dc_dmub_srv *dmub = dc_ctx->dmub_srv; in link_dpia_control() local
441 dc_dmub_srv_cmd_queue(dmub, &cmd); in link_dpia_control()
442 dc_dmub_srv_cmd_execute(dmub); in link_dpia_control()
443 dc_dmub_srv_wait_idle(dmub); in link_dpia_control()

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