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Searched refs:dmn (Results 1 – 18 of 18) sorted by relevance

/linux-6.1.9/drivers/net/ethernet/mellanox/mlx5/core/steering/
Ddr_domain.c8 #define DR_DOMAIN_SW_STEERING_SUPPORTED(dmn, dmn_type) \ argument
9 ((dmn)->info.caps.dmn_type##_sw_owner || \
10 ((dmn)->info.caps.dmn_type##_sw_owner_v2 && \
11 (dmn)->info.caps.sw_format_ver <= MLX5_STEERING_FORMAT_CONNECTX_7))
13 static void dr_domain_init_csum_recalc_fts(struct mlx5dr_domain *dmn) in dr_domain_init_csum_recalc_fts() argument
18 xa_init(&dmn->csum_fts_xa); in dr_domain_init_csum_recalc_fts()
21 static void dr_domain_uninit_csum_recalc_fts(struct mlx5dr_domain *dmn) in dr_domain_uninit_csum_recalc_fts() argument
26 xa_for_each(&dmn->csum_fts_xa, i, recalc_cs_ft) { in dr_domain_uninit_csum_recalc_fts()
28 mlx5dr_fw_destroy_recalc_cs_ft(dmn, recalc_cs_ft); in dr_domain_uninit_csum_recalc_fts()
31 xa_destroy(&dmn->csum_fts_xa); in dr_domain_uninit_csum_recalc_fts()
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Ddr_fw.c8 mlx5dr_fw_create_recalc_cs_ft(struct mlx5dr_domain *dmn, u16 vport_num) in mlx5dr_fw_create_recalc_cs_ft() argument
21 ft_attr.level = dmn->info.caps.max_ft_level - 1; in mlx5dr_fw_create_recalc_cs_ft()
24 ret = mlx5dr_cmd_create_flow_table(dmn->mdev, in mlx5dr_fw_create_recalc_cs_ft()
29 mlx5dr_err(dmn, "Failed creating TTL W/A FW flow table %d\n", ret); in mlx5dr_fw_create_recalc_cs_ft()
33 ret = mlx5dr_cmd_create_empty_flow_group(dmn->mdev, in mlx5dr_fw_create_recalc_cs_ft()
37 mlx5dr_err(dmn, "Failed creating TTL W/A FW flow group %d\n", ret); in mlx5dr_fw_create_recalc_cs_ft()
46 ret = mlx5dr_cmd_alloc_modify_header(dmn->mdev, MLX5_FLOW_TABLE_TYPE_FDB, 1, in mlx5dr_fw_create_recalc_cs_ft()
50 mlx5dr_err(dmn, "Failed modify header TTL %d\n", ret); in mlx5dr_fw_create_recalc_cs_ft()
54 ret = mlx5dr_cmd_set_fte_modify_and_vport(dmn->mdev, in mlx5dr_fw_create_recalc_cs_ft()
59 mlx5dr_err(dmn, "Failed setting TTL W/A flow table entry %d\n", ret); in mlx5dr_fw_create_recalc_cs_ft()
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Ddr_action.c498 static void dr_actions_apply(struct mlx5dr_domain *dmn, in dr_actions_apply() argument
505 struct mlx5dr_ste_ctx *ste_ctx = dmn->ste_ctx; in dr_actions_apply()
509 mlx5dr_ste_set_actions_rx(ste_ctx, dmn, action_type_set, in dr_actions_apply()
512 mlx5dr_ste_set_actions_tx(ste_ctx, dmn, action_type_set, in dr_actions_apply()
553 static int dr_action_handle_cs_recalc(struct mlx5dr_domain *dmn, in dr_action_handle_cs_recalc() argument
568 mlx5dr_dbg(dmn, in dr_action_handle_cs_recalc()
578 ret = mlx5dr_domain_get_recalc_cs_ft_addr(dest_action->vport->dmn, in dr_action_handle_cs_recalc()
582 mlx5dr_err(dmn, "Failed to get FW cs recalc flow table\n"); in dr_action_handle_cs_recalc()
594 static void dr_action_modify_ttl_adjust(struct mlx5dr_domain *dmn, in dr_action_modify_ttl_adjust() argument
602 if (mlx5dr_ste_supp_ttl_cs_recalc(&dmn->info.caps)) in dr_action_modify_ttl_adjust()
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Ddr_table.c6 static int dr_table_set_miss_action_nic(struct mlx5dr_domain *dmn, in dr_table_set_miss_action_nic() argument
38 ret = mlx5dr_ste_htbl_init_and_postsend(dmn, nic_tbl->nic_dmn, in dr_table_set_miss_action_nic()
41 mlx5dr_dbg(dmn, "Failed to set NIC RX/TX miss action, ret %d\n", ret); in dr_table_set_miss_action_nic()
54 mlx5dr_domain_lock(tbl->dmn); in mlx5dr_table_set_miss_action()
56 if (tbl->dmn->type == MLX5DR_DOMAIN_TYPE_NIC_RX || in mlx5dr_table_set_miss_action()
57 tbl->dmn->type == MLX5DR_DOMAIN_TYPE_FDB) { in mlx5dr_table_set_miss_action()
58 ret = dr_table_set_miss_action_nic(tbl->dmn, &tbl->rx, action); in mlx5dr_table_set_miss_action()
63 if (tbl->dmn->type == MLX5DR_DOMAIN_TYPE_NIC_TX || in mlx5dr_table_set_miss_action()
64 tbl->dmn->type == MLX5DR_DOMAIN_TYPE_FDB) { in mlx5dr_table_set_miss_action()
65 ret = dr_table_set_miss_action_nic(tbl->dmn, &tbl->tx, action); in mlx5dr_table_set_miss_action()
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Ddr_matcher.c117 struct mlx5dr_domain *dmn) in dr_mask_is_tnl_vxlan_gpe() argument
120 dr_matcher_supp_vxlan_gpe(&dmn->info.caps); in dr_mask_is_tnl_vxlan_gpe()
143 struct mlx5dr_domain *dmn) in dr_mask_is_tnl_geneve_tlv_opt_exist_set() argument
145 return dr_matcher_supp_flex_parser_ok(&dmn->info.caps) && in dr_mask_is_tnl_geneve_tlv_opt_exist_set()
158 struct mlx5dr_domain *dmn) in dr_mask_is_tnl_geneve() argument
161 dr_matcher_supp_tnl_geneve(&dmn->info.caps); in dr_mask_is_tnl_geneve()
175 struct mlx5dr_domain *dmn) in dr_mask_is_tnl_gtpu() argument
178 dr_matcher_supp_tnl_gtpu(&dmn->info.caps); in dr_mask_is_tnl_gtpu()
187 struct mlx5dr_domain *dmn) in dr_mask_is_tnl_gtpu_dw_0() argument
190 dr_matcher_supp_tnl_gtpu_dw_0(&dmn->info.caps); in dr_mask_is_tnl_gtpu_dw_0()
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Ddr_send.c312 static int dr_handle_pending_wc(struct mlx5dr_domain *dmn, in dr_handle_pending_wc() argument
323 dmn->send_ring->signal_th * TH_NUMS_TO_DRAIN) in dr_handle_pending_wc()
329 mlx5_core_warn_once(dmn->mdev, "SMFS QPN 0x%x is disabled/limited", in dr_handle_pending_wc()
361 static int dr_postsend_icm_data(struct mlx5dr_domain *dmn, in dr_postsend_icm_data() argument
364 struct mlx5dr_send_ring *send_ring = dmn->send_ring; in dr_postsend_icm_data()
368 if (unlikely(dmn->mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR || in dr_postsend_icm_data()
370 mlx5_core_dbg_once(dmn->mdev, in dr_postsend_icm_data()
372 send_ring->err_state, dmn->mdev->state); in dr_postsend_icm_data()
378 ret = dr_handle_pending_wc(dmn, send_ring); in dr_postsend_icm_data()
382 if (send_info->write.length > dmn->info.max_inline_size) { in dr_postsend_icm_data()
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Ddr_rule.c40 struct mlx5dr_domain *dmn = matcher->tbl->dmn; in dr_rule_create_collision_htbl() local
41 struct mlx5dr_ste_ctx *ste_ctx = dmn->ste_ctx; in dr_rule_create_collision_htbl()
47 new_htbl = mlx5dr_ste_htbl_alloc(dmn->ste_icm_pool, in dr_rule_create_collision_htbl()
52 mlx5dr_dbg(dmn, "Failed allocating collision table\n"); in dr_rule_create_collision_htbl()
75 mlx5dr_dbg(matcher->tbl->dmn, "Failed creating collision entry\n"); in dr_rule_create_collision_entry()
88 mlx5dr_dbg(matcher->tbl->dmn, "Failed allocating table\n"); in dr_rule_create_collision_entry()
101 struct mlx5dr_domain *dmn) in dr_rule_handle_one_ste_in_update_list() argument
117 ret = mlx5dr_send_postsend_ste(dmn, ste_info->ste, ste_info->data, in dr_rule_handle_one_ste_in_update_list()
128 struct mlx5dr_domain *dmn, in dr_rule_send_update_list() argument
138 dmn); in dr_rule_send_update_list()
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Ddr_dbg.c57 mutex_lock(&tbl->dmn->dump_info.dbg_mutex); in mlx5dr_dbg_tbl_add()
58 list_add_tail(&tbl->dbg_node, &tbl->dmn->dbg_tbl_list); in mlx5dr_dbg_tbl_add()
59 mutex_unlock(&tbl->dmn->dump_info.dbg_mutex); in mlx5dr_dbg_tbl_add()
64 mutex_lock(&tbl->dmn->dump_info.dbg_mutex); in mlx5dr_dbg_tbl_del()
66 mutex_unlock(&tbl->dmn->dump_info.dbg_mutex); in mlx5dr_dbg_tbl_del()
71 struct mlx5dr_domain *dmn = rule->matcher->tbl->dmn; in mlx5dr_dbg_rule_add() local
73 mutex_lock(&dmn->dump_info.dbg_mutex); in mlx5dr_dbg_rule_add()
75 mutex_unlock(&dmn->dump_info.dbg_mutex); in mlx5dr_dbg_rule_add()
80 struct mlx5dr_domain *dmn = rule->matcher->tbl->dmn; in mlx5dr_dbg_rule_del() local
82 mutex_lock(&dmn->dump_info.dbg_mutex); in mlx5dr_dbg_rule_del()
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Ddr_types.h25 #define mlx5dr_err(dmn, arg...) mlx5_core_err((dmn)->mdev, ##arg) argument
26 #define mlx5dr_info(dmn, arg...) mlx5_core_info((dmn)->mdev, ##arg) argument
27 #define mlx5dr_dbg(dmn, arg...) mlx5_core_dbg((dmn)->mdev, ##arg) argument
207 struct mlx5dr_domain *dmn; member
285 struct mlx5dr_domain *dmn,
291 struct mlx5dr_domain *dmn,
358 int mlx5dr_ste_build_pre_check(struct mlx5dr_domain *dmn,
484 struct mlx5dr_domain *dmn,
931 struct mlx5dr_domain *dmn; member
981 struct mlx5dr_domain *dmn; member
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Ddr_icm_pool.c11 struct mlx5dr_domain *dmn; member
28 struct mlx5dr_domain *dmn; member
93 struct mlx5_core_dev *mdev = pool->dmn->mdev; in dr_icm_pool_mr_create()
103 icm_mr->dmn = pool->dmn; in dr_icm_pool_mr_create()
122 mlx5dr_err(pool->dmn, "Failed to allocate SW ICM memory, err (%d)\n", err); in dr_icm_pool_mr_create()
127 err = dr_icm_create_dm_mkey(mdev, pool->dmn->pdn, in dr_icm_pool_mr_create()
133 mlx5dr_err(pool->dmn, "Failed to create SW ICM MKEY, err (%d)\n", err); in dr_icm_pool_mr_create()
140 mlx5dr_err(pool->dmn, "Failed to get Aligned ICM mem (asked: %zu)\n", in dr_icm_pool_mr_create()
159 struct mlx5_core_dev *mdev = icm_mr->dmn->mdev; in dr_icm_pool_mr_destroy()
366 err = mlx5dr_cmd_sync_steering(pool->dmn->mdev); in dr_icm_pool_sync_all_buddy_pools()
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Dmlx5dr.h50 void mlx5dr_domain_set_peer(struct mlx5dr_domain *dmn,
85 mlx5dr_action_create_dest_table_num(struct mlx5dr_domain *dmn, u32 table_num);
100 mlx5dr_action_create_mult_dest_tbl(struct mlx5dr_domain *dmn,
111 mlx5dr_action_create_flow_sampler(struct mlx5dr_domain *dmn, u32 sampler_id);
117 mlx5dr_action_create_packet_reformat(struct mlx5dr_domain *dmn,
136 mlx5dr_action_create_aso(struct mlx5dr_domain *dmn,
Ddr_ste.c302 struct mlx5dr_domain *dmn = matcher->tbl->dmn; in mlx5dr_ste_free() local
303 struct mlx5dr_ste_ctx *ste_ctx = dmn->ste_ctx; in mlx5dr_ste_free()
354 mlx5dr_send_postsend_ste(dmn, cur_ste_info->ste, in mlx5dr_ste_free()
416 int mlx5dr_ste_htbl_init_and_postsend(struct mlx5dr_domain *dmn, in mlx5dr_ste_htbl_init_and_postsend() argument
424 mlx5dr_ste_set_formatted_ste(dmn->ste_ctx, in mlx5dr_ste_htbl_init_and_postsend()
425 dmn->info.caps.gvmi, in mlx5dr_ste_htbl_init_and_postsend()
431 return mlx5dr_send_postsend_formatted_htbl(dmn, htbl, formatted_ste, update_hw_ste); in mlx5dr_ste_htbl_init_and_postsend()
441 struct mlx5dr_domain *dmn = matcher->tbl->dmn; in mlx5dr_ste_create_next_htbl() local
442 struct mlx5dr_ste_ctx *ste_ctx = dmn->ste_ctx; in mlx5dr_ste_create_next_htbl()
453 next_htbl = mlx5dr_ste_htbl_alloc(dmn->ste_icm_pool, in mlx5dr_ste_create_next_htbl()
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Ddr_dbg.h10 void mlx5dr_dbg_init_dump(struct mlx5dr_domain *dmn);
11 void mlx5dr_dbg_uninit_dump(struct mlx5dr_domain *dmn);
Ddr_ste_v1.h19 void dr_ste_v1_set_actions_tx(struct mlx5dr_domain *dmn, u8 *action_type_set,
22 void dr_ste_v1_set_actions_rx(struct mlx5dr_domain *dmn, u8 *action_type_set,
Ddr_ste.h162 void (*set_actions_rx)(struct mlx5dr_domain *dmn,
168 void (*set_actions_tx)(struct mlx5dr_domain *dmn,
Ddr_ste_v0.c409 dr_ste_v0_set_actions_tx(struct mlx5dr_domain *dmn, in dr_ste_v0_set_actions_tx() argument
467 if (MLX5_CAP_GEN(dmn->mdev, prio_tag_required)) in dr_ste_v0_set_actions_tx()
479 dr_ste_v0_set_actions_rx(struct mlx5dr_domain *dmn, in dr_ste_v0_set_actions_rx() argument
1651 struct mlx5dr_domain *dmn = sb->dmn; in dr_ste_v0_build_src_gvmi_qpn_tag() local
1660 if (misc->source_eswitch_owner_vhca_id == dmn->info.caps.gvmi) in dr_ste_v0_build_src_gvmi_qpn_tag()
1661 vport_dmn = dmn; in dr_ste_v0_build_src_gvmi_qpn_tag()
1662 else if (dmn->peer_dmn && (misc->source_eswitch_owner_vhca_id == in dr_ste_v0_build_src_gvmi_qpn_tag()
1663 dmn->peer_dmn->info.caps.gvmi)) in dr_ste_v0_build_src_gvmi_qpn_tag()
1664 vport_dmn = dmn->peer_dmn; in dr_ste_v0_build_src_gvmi_qpn_tag()
1670 vport_dmn = dmn; in dr_ste_v0_build_src_gvmi_qpn_tag()
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Ddr_ste_v1.c538 void dr_ste_v1_set_actions_tx(struct mlx5dr_domain *dmn, in dr_ste_v1_set_actions_tx() argument
677 void dr_ste_v1_set_actions_rx(struct mlx5dr_domain *dmn, in dr_ste_v1_set_actions_rx() argument
1863 struct mlx5dr_domain *dmn = sb->dmn; in dr_ste_v1_build_src_gvmi_qpn_tag() local
1871 if (misc->source_eswitch_owner_vhca_id == dmn->info.caps.gvmi) in dr_ste_v1_build_src_gvmi_qpn_tag()
1872 vport_dmn = dmn; in dr_ste_v1_build_src_gvmi_qpn_tag()
1873 else if (dmn->peer_dmn && (misc->source_eswitch_owner_vhca_id == in dr_ste_v1_build_src_gvmi_qpn_tag()
1874 dmn->peer_dmn->info.caps.gvmi)) in dr_ste_v1_build_src_gvmi_qpn_tag()
1875 vport_dmn = dmn->peer_dmn; in dr_ste_v1_build_src_gvmi_qpn_tag()
1881 vport_dmn = dmn; in dr_ste_v1_build_src_gvmi_qpn_tag()
1889 mlx5dr_err(dmn, "Vport 0x%x is disabled or invalid\n", in dr_ste_v1_build_src_gvmi_qpn_tag()
/linux-6.1.9/drivers/powercap/
Dintel_rapl_common.c1143 int dmn, prim; in rapl_update_domain_data() local
1146 for (dmn = 0; dmn < rp->nr_domains; dmn++) { in rapl_update_domain_data()
1148 rp->domains[dmn].name); in rapl_update_domain_data()
1151 if (!rapl_read_data_raw(&rp->domains[dmn], prim, in rapl_update_domain_data()
1153 rp->domains[dmn].rdd.primitives[prim] = val; in rapl_update_domain_data()