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Searched refs:dmc_id (Results 1 – 2 of 2) sorted by relevance

/linux-6.1.9/drivers/gpu/drm/i915/display/
Dintel_dmc_regs.h17 #define __PIPEDMC_REG_MMIO_BASE(i915, dmc_id) \ argument
20 0x400 * ((dmc_id) - 1))
24 #define _DMC_REG_MMIO_BASE(i915, dmc_id) \ argument
25 ((dmc_id) == DMC_FW_MAIN ? __DMC_REG_MMIO_BASE : \
26 __PIPEDMC_REG_MMIO_BASE(i915, dmc_id))
28 #define _DMC_REG(i915, dmc_id, reg) \ argument
29 ((reg) - __DMC_REG_MMIO_BASE + _DMC_REG_MMIO_BASE(i915, dmc_id))
35 #define DMC_EVT_HTP(i915, dmc_id, handler) \ argument
36 _MMIO(_DMC_REG(i915, dmc_id, _DMC_EVT_HTP_0) + 4 * (handler))
40 #define DMC_EVT_CTL(i915, dmc_id, handler) \ argument
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Dintel_dmc.c159 u8 dmc_id; member
251 static bool has_dmc_id_fw(struct drm_i915_private *i915, int dmc_id) in has_dmc_id_fw() argument
253 return i915->display.dmc.dmc_info[dmc_id].payload; in has_dmc_id_fw()
317 get_flip_queue_event_regs(struct drm_i915_private *i915, int dmc_id, in get_flip_queue_event_regs() argument
320 switch (dmc_id) { in get_flip_queue_event_regs()
323 *ctl_reg = DMC_EVT_CTL(i915, dmc_id, 3); in get_flip_queue_event_regs()
324 *htp_reg = DMC_EVT_HTP(i915, dmc_id, 3); in get_flip_queue_event_regs()
331 *ctl_reg = DMC_EVT_CTL(i915, dmc_id, 2); in get_flip_queue_event_regs()
332 *htp_reg = DMC_EVT_HTP(i915, dmc_id, 2); in get_flip_queue_event_regs()
345 int dmc_id; in disable_all_flip_queue_events() local
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