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Searched refs:dmar_writeq (Results 1 – 6 of 6) sorted by relevance

/linux-6.1.9/drivers/iommu/intel/
Dsvm.c110 dmar_writeq(iommu->reg + DMAR_PQH_REG, 0ULL); in intel_svm_enable_prq()
111 dmar_writeq(iommu->reg + DMAR_PQT_REG, 0ULL); in intel_svm_enable_prq()
112 dmar_writeq(iommu->reg + DMAR_PQA_REG, virt_to_phys(iommu->prq) | PRQ_ORDER); in intel_svm_enable_prq()
133 dmar_writeq(iommu->reg + DMAR_PQH_REG, 0ULL); in intel_svm_finish_prq()
134 dmar_writeq(iommu->reg + DMAR_PQT_REG, 0ULL); in intel_svm_finish_prq()
135 dmar_writeq(iommu->reg + DMAR_PQA_REG, 0ULL); in intel_svm_finish_prq()
765 dmar_writeq(iommu->reg + DMAR_PQH_REG, tail); in prq_event_thread()
Dpasid.c37 dmar_writeq(iommu->reg + DMAR_VCMD_REG, VCMD_CMD_ALLOC); in vcmd_alloc_pasid()
67 dmar_writeq(iommu->reg + DMAR_VCMD_REG, in vcmd_free_pasid()
Diommu.h139 #define dmar_writeq(a,v) writeq(v,a) macro
Diommu.c1230 dmar_writeq(iommu->reg + DMAR_RTADDR_REG, addr); in iommu_set_root_entry()
1296 dmar_writeq(iommu->reg + DMAR_CCMD_REG, val); in __iommu_flush_context()
1344 dmar_writeq(iommu->reg + tlb_offset, val_iva); in __iommu_flush_iotlb()
1345 dmar_writeq(iommu->reg + tlb_offset + 8, val); in __iommu_flush_iotlb()
Dirq_remapping.c483 dmar_writeq(iommu->reg + DMAR_IRTA_REG, in iommu_set_irq_remapping()
Ddmar.c1669 dmar_writeq(iommu->reg + DMAR_IQA_REG, val); in __dmar_enable_qi()