Searched refs:dma_resv_assert_held (Results 1 – 21 of 21) sorted by relevance
182 dma_resv_assert_held(obj); in dma_resv_reserve_fences()255 dma_resv_assert_held(obj); in dma_resv_reset_max_fences()284 dma_resv_assert_held(obj); in dma_resv_add_fence()337 dma_resv_assert_held(obj); in dma_resv_replace_fences()462 dma_resv_assert_held(cursor->obj); in dma_resv_iter_first()484 dma_resv_assert_held(cursor->obj); in dma_resv_iter_next()514 dma_resv_assert_held(dst); in dma_resv_copy_fences()
988 dma_resv_assert_held(dmabuf->resv); in dma_buf_pin()1011 dma_resv_assert_held(dmabuf->resv); in dma_buf_unpin()1051 dma_resv_assert_held(attach->dmabuf->resv); in dma_buf_map_attachment()1066 dma_resv_assert_held(attach->dmabuf->resv); in dma_buf_map_attachment()1128 dma_resv_assert_held(attach->dmabuf->resv); in dma_buf_unmap_attachment()1134 dma_resv_assert_held(attach->dmabuf->resv); in dma_buf_unmap_attachment()1156 dma_resv_assert_held(dmabuf->resv); in dma_buf_move_notify()
77 dma_resv_assert_held(bo->base.resv); in ttm_bo_move_to_lru_tail()100 dma_resv_assert_held(bo->base.resv); in ttm_bo_set_bulk_move()474 dma_resv_assert_held(bo->base.resv); in ttm_bo_evict()524 dma_resv_assert_held(bo->base.resv); in ttm_bo_eviction_valuable()553 dma_resv_assert_held(bo->base.resv); in ttm_bo_evict_swapout_allowable()683 dma_resv_assert_held(bo->base.resv); in ttm_bo_pin()701 dma_resv_assert_held(bo->base.resv); in ttm_bo_unpin()860 dma_resv_assert_held(bo->base.resv); in ttm_bo_move_buffer()895 dma_resv_assert_held(bo->base.resv); in ttm_bo_validate()1003 dma_resv_assert_held(resv); in ttm_bo_init_reserved()
408 dma_resv_assert_held(bo->base.resv); in ttm_bo_vmap()468 dma_resv_assert_held(bo->base.resv); in ttm_bo_vunmap()
65 dma_resv_assert_held(pos->first->bo->base.resv); in ttm_lru_bulk_move_tail()66 dma_resv_assert_held(pos->last->bo->base.resv); in ttm_lru_bulk_move_tail()
64 dma_resv_assert_held(bo->base.resv); in ttm_tt_create()
24 dma_resv_assert_held(umem_dmabuf->attach->dmabuf->resv); in ib_umem_dmabuf_map_pages()84 dma_resv_assert_held(umem_dmabuf->attach->dmabuf->resv); in ib_umem_dmabuf_unmap_pages()
464 dma_resv_assert_held(dst->base.resv); in vmw_bo_cpu_blit()466 dma_resv_assert_held(src->base.resv); in vmw_bo_cpu_blit()
177 dma_resv_assert_held(bo->base.resv); in vmw_cotable_unscrub()319 dma_resv_assert_held(bo->base.resv); in vmw_cotable_unbind()
45 dma_resv_assert_held(res->backup->base.base.resv); in vmw_resource_mob_attach()72 dma_resv_assert_held(backup->base.base.resv); in vmw_resource_mob_detach()750 dma_resv_assert_held(vbo->base.base.resv); in vmw_resource_unbind_list()
305 dma_resv_assert_held(bo->base.resv); in vmw_bo_pin_reserved()
165 dma_resv_assert_held(bo->tbo.base.resv); in qxl_bo_vmap_locked()241 dma_resv_assert_held(bo->tbo.base.resv); in qxl_bo_vunmap_locked()
228 dma_resv_assert_held(resv); in i915_deps_add_resv()
229 #define assert_vma_held(vma) dma_resv_assert_held((vma)->obj->base.resv)
550 dma_resv_assert_held(bo->tbo.base.resv); in radeon_bo_get_surface_reg()675 dma_resv_assert_held(bo->tbo.base.resv); in radeon_bo_get_tiling_flags()687 dma_resv_assert_held(bo->tbo.base.resv); in radeon_bo_check_tiling()
312 #define dma_resv_assert_held(obj) lockdep_assert_held(&(obj)->lock.base) macro
273 dma_resv_assert_held(vm->root.bo->tbo.base.resv); in amdgpu_vm_bo_base_init()1361 dma_resv_assert_held(bo->tbo.base.resv); in amdgpu_vm_bo_add()1756 dma_resv_assert_held(vm->root.bo->tbo.base.resv); in amdgpu_vm_bo_del()1759 dma_resv_assert_held(bo->tbo.base.resv); in amdgpu_vm_bo_del()
1128 dma_resv_assert_held(bo->tbo.base.resv); in amdgpu_bo_get_tiling_flags()
158 #define assert_object_held(obj) dma_resv_assert_held((obj)->base.resv)
710 dma_resv_assert_held(obj->resv); in drm_sched_job_add_implicit_dependencies()
1271 dma_resv_assert_held(umem_dmabuf->attach->dmabuf->resv); in mlx5_ib_dmabuf_invalidate_cb()