Home
last modified time | relevance | path

Searched refs:dm_write_reg (Results 1 – 25 of 42) sorted by relevance

12

/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dce110/
Ddce110_opp_regamma_v.c68 dm_write_reg(xfm->ctx, mmDCFEV_MEM_PWR_CTRL, value); in power_on_lut()
97 dm_write_reg(xfm_dce->base.ctx, in set_bypass_input_gamma()
111 dm_write_reg(xfm_dce->base.ctx, mmGAMMA_CORR_CONTROL, 0); in configure_regamma_mode()
149 dm_write_reg(xfm_dce->base.ctx, mmGAMMA_CORR_CNTLA_START_CNTL, in regamma_config_regions_and_segments()
160 dm_write_reg(xfm_dce->base.ctx, in regamma_config_regions_and_segments()
171 dm_write_reg(xfm_dce->base.ctx, in regamma_config_regions_and_segments()
188 dm_write_reg(xfm_dce->base.ctx, in regamma_config_regions_and_segments()
220 dm_write_reg( in regamma_config_regions_and_segments()
253 dm_write_reg(xfm_dce->base.ctx, in regamma_config_regions_and_segments()
285 dm_write_reg(xfm_dce->base.ctx, in regamma_config_regions_and_segments()
[all …]
Ddce110_mem_input_v.c53 dm_write_reg( in set_flip_control()
74 dm_write_reg( in program_pri_addr_c()
88 dm_write_reg( in program_pri_addr_c()
110 dm_write_reg( in program_pri_addr_l()
124 dm_write_reg( in program_pri_addr_l()
160 dm_write_reg(mem_input110->base.ctx, in enable()
202 dm_write_reg( in program_tiling()
224 dm_write_reg( in program_tiling()
255 dm_write_reg( in program_size_and_rotation()
263 dm_write_reg( in program_size_and_rotation()
[all …]
Ddce110_opp_csc_v.c142 dm_write_reg(ctx, addr, value); in program_color_matrix_v()
160 dm_write_reg(ctx, addr, value); in program_color_matrix_v()
178 dm_write_reg(ctx, addr, value); in program_color_matrix_v()
196 dm_write_reg(ctx, addr, value); in program_color_matrix_v()
214 dm_write_reg(ctx, addr, value); in program_color_matrix_v()
232 dm_write_reg(ctx, addr, value); in program_color_matrix_v()
256 dm_write_reg(ctx, addr, value); in program_color_matrix_v()
274 dm_write_reg(ctx, addr, value); in program_color_matrix_v()
292 dm_write_reg(ctx, addr, value); in program_color_matrix_v()
310 dm_write_reg(ctx, addr, value); in program_color_matrix_v()
[all …]
Ddce110_compressor.c89 dm_write_reg(compressor->ctx, DCP_REG(mmLB_SYNC_RESET_SEL), value); in reset_lb_on_vblank()
106 dm_write_reg(compressor->ctx, DCP_REG(mmLB_SYNC_RESET_SEL), value); in reset_lb_on_vblank()
157 dm_write_reg(compressor->ctx, addr, value); in dce110_compressor_power_up_fbc()
164 dm_write_reg(compressor->ctx, addr, value); in dce110_compressor_power_up_fbc()
169 dm_write_reg(compressor->ctx, addr, value); in dce110_compressor_power_up_fbc()
175 dm_write_reg(compressor->ctx, addr, value); in dce110_compressor_power_up_fbc()
179 dm_write_reg(compressor->ctx, mmFBC_IND_LUT0, value); in dce110_compressor_power_up_fbc()
182 dm_write_reg(compressor->ctx, mmFBC_IND_LUT1, value); in dce110_compressor_power_up_fbc()
205 dm_write_reg(compressor->ctx, addr, value); in dce110_compressor_enable_fbc()
216 dm_write_reg(compressor->ctx, addr, value); in dce110_compressor_enable_fbc()
[all …]
Ddce110_timing_generator_v.c64 dm_write_reg(tg->ctx, in dce110_timing_generator_v_enable_crtc()
69 dm_write_reg(tg->ctx, mmCRTCV_MASTER_UPDATE_MODE, value); in dce110_timing_generator_v_enable_crtc()
74 dm_write_reg(tg->ctx, in dce110_timing_generator_v_enable_crtc()
90 dm_write_reg(tg->ctx, in dce110_timing_generator_v_disable_crtc()
116 dm_write_reg(tg->ctx, addr, value); in dce110_timing_generator_v_blank_crtc()
136 dm_write_reg(tg->ctx, addr, value); in dce110_timing_generator_v_unblank_crtc()
265 dm_write_reg(ctx, addr, value); in dce110_timing_generator_v_program_blanking()
274 dm_write_reg(ctx, addr, value); in dce110_timing_generator_v_program_blanking()
297 dm_write_reg(ctx, addr, value); in dce110_timing_generator_v_program_blanking()
319 dm_write_reg(ctx, addr, value); in dce110_timing_generator_v_program_blanking()
[all …]
Ddce110_timing_generator.c116 dm_write_reg(tg->ctx, address, regval); in dce110_timing_generator_set_early_control()
140 dm_write_reg(tg->ctx, CRTC_REG(mmCRTC_MASTER_UPDATE_MODE), value); in dce110_timing_generator_enable_crtc()
144 dm_write_reg(tg->ctx, CRTC_REG(mmCRTC_MASTER_UPDATE_LOCK), value); in dce110_timing_generator_enable_crtc()
175 dm_write_reg(tg->ctx, addr, value); in dce110_timing_generator_program_blank_color()
222 dm_write_reg(tg->ctx, addr, value);
225 dm_write_reg(tg->ctx, addr, value);
271 dm_write_reg(tg->ctx, in program_horz_count_by_2()
460 dm_write_reg(tg->ctx, addr, v_total_min); in dce110_timing_generator_set_drr()
463 dm_write_reg(tg->ctx, addr, v_total_max); in dce110_timing_generator_set_drr()
466 dm_write_reg(tg->ctx, addr, v_total_cntl); in dce110_timing_generator_set_drr()
[all …]
Ddce110_transform_v.c99 dm_write_reg(ctx, addr, value); in program_viewport()
113 dm_write_reg(ctx, addr, value); in program_viewport()
129 dm_write_reg(ctx, addr, value); in program_viewport()
143 dm_write_reg(ctx, addr, value); in program_viewport()
173 dm_write_reg(ctx, mmSCLV_TAP_CONTROL, value); in setup_scaling_configuration()
204 dm_write_reg(ctx, mmSCLV_MODE, value); in setup_scaling_configuration()
213 dm_write_reg(ctx, mmSCLV_CONTROL, value); in setup_scaling_configuration()
263 dm_write_reg(xfm_dce->base.ctx, in program_overscan()
267 dm_write_reg(xfm_dce->base.ctx, in program_overscan()
279 dm_write_reg(xfm_dce->base.ctx, mmSCLV_UPDATE, value); in set_coeff_update_complete()
[all …]
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dce112/
Ddce112_compressor.c334 dm_write_reg(compressor->ctx, addr, value); in dce112_compressor_power_up_fbc()
341 dm_write_reg(compressor->ctx, addr, value); in dce112_compressor_power_up_fbc()
346 dm_write_reg(compressor->ctx, addr, value); in dce112_compressor_power_up_fbc()
352 dm_write_reg(compressor->ctx, addr, value); in dce112_compressor_power_up_fbc()
356 dm_write_reg(compressor->ctx, mmFBC_IND_LUT0, value); in dce112_compressor_power_up_fbc()
359 dm_write_reg(compressor->ctx, mmFBC_IND_LUT1, value); in dce112_compressor_power_up_fbc()
397 dm_write_reg(compressor->ctx, addr, value); in dce112_compressor_enable_fbc()
406 dm_write_reg(compressor->ctx, addr, value); in dce112_compressor_enable_fbc()
408 dm_write_reg(compressor->ctx, addr, value); in dce112_compressor_enable_fbc()
424 dm_write_reg(compressor->ctx, mmFBC_CNTL, reg_data); in dce112_compressor_disable_fbc()
[all …]
Ddce112_hw_sequencer.c109 dm_write_reg(ctx, addr, value); in dce112_init_pte()
141 dm_write_reg(ctx, in dce112_enable_display_power_gating()
/linux-6.1.9/drivers/net/usb/
Ddm9601.c89 static int dm_write_reg(struct usbnet *dev, u8 reg, u8 value) in dm_write_reg() function
117 dm_write_reg(dev, DM_SHARED_ADDR, phy ? (reg | 0x40) : reg); in dm_read_shared_word()
118 dm_write_reg(dev, DM_SHARED_CTRL, phy ? 0xc : 0x4); in dm_read_shared_word()
139 dm_write_reg(dev, DM_SHARED_CTRL, 0x0); in dm_read_shared_word()
160 dm_write_reg(dev, DM_SHARED_ADDR, phy ? (reg | 0x40) : reg); in dm_write_shared_word()
161 dm_write_reg(dev, DM_SHARED_CTRL, phy ? 0x1a : 0x12); in dm_write_shared_word()
182 dm_write_reg(dev, DM_SHARED_CTRL, 0x0); in dm_write_shared_word()
381 dm_write_reg(dev, DM_NET_CTRL, 1); in dm9601_bind()
418 dm_write_reg(dev, DM_MODE_CTRL, mode & 0x7f); in dm9601_bind()
422 dm_write_reg(dev, DM_GPR_CTRL, 1); in dm9601_bind()
[all …]
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dce/
Ddce_dmcu.c250 dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG1), in dce_dmcu_setup_psr()
262 dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG2), in dce_dmcu_setup_psr()
267 dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG3), in dce_dmcu_setup_psr()
315 dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG1), masterCmdData1.u32); in dce_psr_wait_loop()
688 dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG1), in dcn10_dmcu_setup_psr()
700 dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG2), in dcn10_dmcu_setup_psr()
705 dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG3), in dcn10_dmcu_setup_psr()
740 dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG1), masterCmdData1.u32); in dcn10_psr_wait_loop()
956 dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG1), in dcn10_forward_crc_window()
959 dm_write_reg(dmcu->ctx, REG(MASTER_COMM_DATA_REG2), in dcn10_forward_crc_window()
[all …]
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dce60/
Ddce60_timing_generator.c105 dm_write_reg(tg->ctx, addr, value); in program_pix_dur()
174 dm_write_reg(tg->ctx, addr, value); in dce60_timing_generator_enable_advanced_request()
175 dm_write_reg(tg->ctx, addr2, value2); in dce60_timing_generator_enable_advanced_request()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/irq/
Dirq_service.c95 dm_write_reg(irq_service->ctx, addr, value); in dal_irq_service_set_generic()
132 dm_write_reg(irq_service->ctx, addr, value); in dal_irq_service_ack_generic()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dce120/
Ddce120_hw_sequencer.c145 dm_write_reg(ctx, addr, value);
180 dm_write_reg(ctx, in dce120_enable_display_power_gating()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dce80/
Ddce80_timing_generator.c105 dm_write_reg(tg->ctx, addr, value); in program_pix_dur()
182 dm_write_reg(tg->ctx, addr, value); in dce80_timing_generator_enable_advanced_request()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/
Ddc_helper.c267 dm_write_reg(ctx, addr, reg_val); in generic_reg_update_ex()
296 dm_write_reg(ctx, addr, reg_val); in generic_reg_set_ex()
508 dm_write_reg(ctx, addr_index, index); in generic_write_indirect_reg()
509 dm_write_reg(ctx, addr_data, data); in generic_write_indirect_reg()
524 dm_write_reg(ctx, addr_index, index); in generic_read_indirect_reg()
Ddm_services.h67 #define dm_write_reg(ctx, address, value) \ macro
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dce100/
Ddce100_hw_sequencer.c97 dm_write_reg(ctx, in dce100_enable_display_power_gating()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn321/
Ddcn321_dio_link_encoder.c62 dm_write_reg(CTX, AUX_REG(reg_name), val)
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_dio_link_encoder.c218 dm_write_reg(CTX, AUX_REG(reg_name), val)
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/irq/dce80/
Dirq_service_dce80.c62 dm_write_reg(irq_service->ctx, info->enable_reg, value); in hpd_ack()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/irq/dce120/
Dirq_service_dce120.c62 dm_write_reg(irq_service->ctx, info->enable_reg, value); in hpd_ack()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/irq/dce60/
Dirq_service_dce60.c71 dm_write_reg(irq_service->ctx, info->enable_reg, value); in hpd_ack()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/irq/dcn303/
Dirq_service_dcn303.c73 dm_write_reg(irq_service->ctx, info->enable_reg, value); in hpd_ack()
/linux-6.1.9/drivers/gpu/drm/amd/display/dc/dcn32/
Ddcn32_dio_link_encoder.c63 dm_write_reg(CTX, AUX_REG(reg_name), val)

12