Searched refs:div3 (Results 1 – 4 of 4) sorted by relevance
/linux-6.1.9/drivers/clk/uniphier/ |
D | clk-uniphier.h | 118 #define UNIPHIER_CLK_DIV4(parent, div0, div1, div2, div3) \ argument 120 UNIPHIER_CLK_DIV2(parent, div2, div3) 122 #define UNIPHIER_CLK_DIV5(parent, div0, div1, div2, div3, div4) \ argument 123 UNIPHIER_CLK_DIV4(parent, div0, div1, div2, div3), \
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/linux-6.1.9/drivers/video/fbdev/aty/ |
D | aty128fb.c | 1322 u32 div3; in aty128_set_pll() local 1341 div3 = aty_ld_pll(PPLL_DIV_3); in aty128_set_pll() 1342 div3 &= ~PPLL_FB3_DIV_MASK; in aty128_set_pll() 1343 div3 |= pll->feedback_divider; in aty128_set_pll() 1344 div3 &= ~PPLL_POST3_DIV_MASK; in aty128_set_pll() 1345 div3 |= post_conv[pll->post_divider] << 16; in aty128_set_pll() 1349 aty_st_pll(PPLL_DIV_3, div3); in aty128_set_pll()
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/linux-6.1.9/Documentation/devicetree/bindings/clock/ |
D | tesla,fsd-clock.yaml | 93 - description: PERIC shared0 div3 TBU clock (from CMU_CMU)
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/linux-6.1.9/sound/soc/codecs/ |
D | da7210.c | 216 u8 div3; member 1006 pll_div3 = da7210_pll_div[cnt].div3; in da7210_set_dai_pll()
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