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/linux-6.1.9/Documentation/scheduler/
Dsched-deadline.rst53 "deadline", to schedule tasks. A SCHED_DEADLINE task should receive
55 these "runtime" microseconds are available within "deadline" microseconds
57 every time the task wakes up, the scheduler computes a "scheduling deadline"
60 earliest scheduling deadline is selected for execution). Notice that the
61 task actually receives "runtime" time units within "deadline" if a proper
68 algorithm selects the task with the earliest scheduling deadline as the one
77 "deadline", and "period" parameters;
79 - The state of the task is described by a "scheduling deadline", and
87 scheduling deadline - current time period
89 then, if the scheduling deadline is smaller than the current time, or
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Dsched-rt-group.rst156 as its prone to starvation without deadline scheduling.
174 full deadline scheduling to the linux kernel. Deadline scheduling the above
175 groups and treating end of the period as a deadline will ensure that they both
180 the limited static priority levels 0-99. With deadline scheduling you need to
181 do deadline inheritance (since priority is inversely proportional to the
182 deadline delta (deadline - now)).
/linux-6.1.9/kernel/sched/
Ddeadline.c410 zerolag_time = dl_se->deadline - in task_non_contending()
616 rq->dl.earliest_dl.next = p->dl.deadline; in enqueue_pushable_dl_task()
630 dl_rq->earliest_dl.next = __node_2_pdl(leftmost)->dl.deadline; in dequeue_pushable_dl_task()
777 dl_se->deadline = rq_clock(rq) + pi_of(dl_se)->dl_deadline; in replenish_dl_new_period()
799 WARN_ON(dl_time_before(rq_clock(rq), dl_se->deadline)); in setup_new_dl_entity()
859 dl_se->deadline += pi_of(dl_se)->dl_period; in replenish_dl_entity()
872 if (dl_time_before(dl_se->deadline, rq_clock(rq))) { in replenish_dl_entity()
930 right = ((dl_se->deadline - t) >> DL_SCALE) * in dl_entity_overflow()
957 u64 laxity = dl_se->deadline - rq_clock(rq); in update_dl_revised_wakeup()
965 WARN_ON(dl_time_before(dl_se->deadline, rq_clock(rq))); in update_dl_revised_wakeup()
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/linux-6.1.9/drivers/ata/
Dahci_da850.c94 unsigned int *class, unsigned long deadline) in ahci_da850_softreset() argument
107 ret = ahci_do_softreset(link, class, pmp, deadline, ahci_check_ready); in ahci_da850_softreset()
110 deadline, ahci_check_ready); in ahci_da850_softreset()
116 unsigned int *class, unsigned long deadline) in ahci_da850_hardreset() argument
130 ret = ahci_do_hardreset(link, class, deadline, &online); in ahci_da850_hardreset()
Dahci_xgene.c117 unsigned long deadline; in xgene_ahci_poll_reg_val() local
121 deadline = ata_deadline(jiffies, timeout); in xgene_ahci_poll_reg_val()
123 while (tmp != val && time_before(jiffies, deadline)) { in xgene_ahci_poll_reg_val()
351 unsigned long deadline, bool *online) in xgene_ahci_do_hardreset() argument
370 rc = sata_link_hardreset(link, timing, deadline, online, in xgene_ahci_do_hardreset()
391 unsigned long deadline) in xgene_ahci_hardreset() argument
413 rc = xgene_ahci_do_hardreset(link, deadline, &online); in xgene_ahci_hardreset()
452 unsigned long deadline) in xgene_ahci_pmp_softreset() argument
469 rc = ahci_do_softreset(link, class, pmp, deadline, ahci_check_ready); in xgene_ahci_pmp_softreset()
496 unsigned long deadline) in xgene_ahci_softreset() argument
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Dahci_dm816.c104 unsigned int *class, unsigned long deadline) in ahci_dm816_softreset() argument
117 ret = ahci_do_softreset(link, class, pmp, deadline, ahci_check_ready); in ahci_dm816_softreset()
120 deadline, ahci_check_ready); in ahci_dm816_softreset()
Dlibata-sata.c234 unsigned long deadline) in sata_link_debounce() argument
243 if (time_before(t, deadline)) in sata_link_debounce()
244 deadline = t; in sata_link_debounce()
261 if (cur == 1 && time_before(jiffies, deadline)) in sata_link_debounce()
276 if (time_after(jiffies, deadline)) in sata_link_debounce()
297 unsigned long deadline) in sata_link_resume() argument
338 if ((rc = sata_link_debounce(link, params, deadline))) in sata_link_resume()
530 unsigned long deadline, in sata_link_hardreset() argument
571 rc = sata_link_resume(link, timing, deadline); in sata_link_hardreset()
593 if (time_after(pmp_deadline, deadline)) in sata_link_hardreset()
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Dlibata-eh.c2413 unsigned int *classes, unsigned long deadline, in ata_do_reset() argument
2422 return reset(link, classes, deadline); in ata_do_reset()
2450 unsigned long deadline, now; in ata_eh_reset() local
2472 deadline = ata_deadline(ehc->last_reset, in ata_eh_reset()
2474 if (time_before(now, deadline)) in ata_eh_reset()
2475 schedule_timeout_uninterruptible(deadline - now); in ata_eh_reset()
2516 unsigned long deadline = ata_deadline(jiffies, in ata_eh_reset() local
2524 rc = prereset(link, deadline); in ata_eh_reset()
2533 tmp = prereset(slave, deadline); in ata_eh_reset()
2577 deadline = ata_deadline(jiffies, ata_eh_reset_timeouts[try++]); in ata_eh_reset()
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Dpata_jmicron.c42 static int jmicron_pre_reset(struct ata_link *link, unsigned long deadline) in jmicron_pre_reset() argument
105 return ata_sff_prereset(link, deadline); in jmicron_pre_reset()
Dpata_marvell.c62 static int marvell_pre_reset(struct ata_link *link, unsigned long deadline) in marvell_pre_reset() argument
71 return ata_sff_prereset(link, deadline); in marvell_pre_reset()
Dpata_ns87410.c26 static int ns87410_pre_reset(struct ata_link *link, unsigned long deadline) in ns87410_pre_reset() argument
38 return ata_sff_prereset(link, deadline); in ns87410_pre_reset()
Dpata_opti.c54 static int opti_pre_reset(struct ata_link *link, unsigned long deadline) in opti_pre_reset() argument
66 return ata_sff_prereset(link, deadline); in opti_pre_reset()
Dsata_sil24.c337 unsigned long deadline);
339 unsigned long deadline);
341 unsigned long deadline);
650 unsigned long deadline) in sil24_softreset() argument
666 if (time_after(deadline, jiffies)) in sil24_softreset()
667 timeout_msec = jiffies_to_msecs(deadline - jiffies); in sil24_softreset()
691 unsigned long deadline) in sil24_hardreset() argument
738 rc = sata_link_debounce(link, sata_deb_timing_long, deadline); in sil24_hardreset()
934 unsigned long deadline) in sil24_pmp_hardreset() argument
944 return sata_std_hardreset(link, class, deadline); in sil24_pmp_hardreset()
Dpata_samsung_cf.c340 unsigned long deadline) in pata_s3c_wait_after_reset() argument
347 rc = ata_sff_wait_ready(link, deadline); in pata_s3c_wait_after_reset()
361 unsigned long deadline) in pata_s3c_bus_softreset() argument
373 return pata_s3c_wait_after_reset(&ap->link, deadline); in pata_s3c_bus_softreset()
380 unsigned long deadline) in pata_s3c_softreset() argument
395 rc = pata_s3c_bus_softreset(ap, deadline); in pata_s3c_softreset()
/linux-6.1.9/Documentation/block/
Dswitching-sched.rst17 the fly to select one of mq-deadline, none, bfq, or kyber schedulers -
32 [mq-deadline] kyber bfq none
35 [none] mq-deadline kyber bfq
Ddeadline-iosched.rst5 This little file attempts to document how the deadline io scheduler works.
19 The goal of the deadline io scheduler is to attempt to guarantee a start
22 a deadline that is the current time + the read_expire value in units of
37 deadline expiries are only checked between batches. fifo_batch controls the
/linux-6.1.9/include/trace/events/
Dlibata.h527 TP_PROTO(struct ata_link *link, unsigned int *class, unsigned long deadline),
529 TP_ARGS(link, class, deadline),
534 __field( unsigned long, deadline )
540 __entry->deadline = deadline;
544 __entry->ata_port, __entry->deadline,
550 TP_PROTO(struct ata_link *link, unsigned int *class, unsigned long deadline),
551 TP_ARGS(link, class, deadline));
554 TP_PROTO(struct ata_link *link, unsigned int *class, unsigned long deadline),
555 TP_ARGS(link, class, deadline));
558 TP_PROTO(struct ata_link *link, unsigned int *class, unsigned long deadline),
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/linux-6.1.9/drivers/bcma/
Ddriver_chipcommon_b.c17 unsigned long deadline = jiffies + timeout; in bcma_wait_reg() local
26 } while (!time_after_eq(jiffies, deadline)); in bcma_wait_reg()
/linux-6.1.9/include/scsi/
Dsas_ata.h37 int sas_ata_wait_after_reset(struct domain_device *dev, unsigned long deadline);
97 unsigned long deadline) in sas_ata_wait_after_reset() argument
/linux-6.1.9/drivers/net/phy/mscc/
Dmscc_serdes.c312 unsigned long deadline; in vsc85xx_sd6g_config_v2() local
381 deadline = jiffies + msecs_to_jiffies(PROC_CMD_NCOMPLETED_TIMEOUT_MS); in vsc85xx_sd6g_config_v2()
390 } while (time_before(jiffies, deadline) && (val32 & BIT(12))); in vsc85xx_sd6g_config_v2()
474 deadline = jiffies + msecs_to_jiffies(PROC_CMD_NCOMPLETED_TIMEOUT_MS); in vsc85xx_sd6g_config_v2()
483 } while (time_before(jiffies, deadline) && (~val32 & BIT(8))); in vsc85xx_sd6g_config_v2()
630 deadline = jiffies + msecs_to_jiffies(PROC_CMD_NCOMPLETED_TIMEOUT_MS); in vsc85xx_sd6g_config_v2()
639 } while (time_before(jiffies, deadline) && (val32 & BIT(12))); in vsc85xx_sd6g_config_v2()
/linux-6.1.9/include/linux/
Dlibata.h486 typedef int (*ata_prereset_fn_t)(struct ata_link *link, unsigned long deadline);
488 unsigned long deadline);
1046 extern int ata_std_prereset(struct ata_link *link, unsigned long deadline);
1047 extern int ata_wait_after_reset(struct ata_link *link, unsigned long deadline,
1050 unsigned long deadline);
1169 const unsigned long *timing, unsigned long deadline,
1172 unsigned long deadline);
1196 unsigned long deadline, in sata_link_hardreset() argument
1206 unsigned long deadline) in sata_link_resume() argument
1213 const unsigned long *params, unsigned long deadline);
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/linux-6.1.9/kernel/locking/
Dww_mutex.h251 if (dl_time_before(b->task->dl.deadline, in __ww_ctx_less()
252 a->task->dl.deadline)) in __ww_ctx_less()
255 if (dl_time_before(a->task->dl.deadline, in __ww_ctx_less()
256 b->task->dl.deadline)) in __ww_ctx_less()
Drtmutex.c340 waiter->deadline = task->dl.deadline; in waiter_update_prio()
347 &(struct rt_mutex_waiter){ .prio = __waiter_prio(p), .deadline = (p)->dl.deadline }
362 return dl_time_before(left->deadline, right->deadline); in rt_mutex_waiter_less()
380 return left->deadline == right->deadline; in rt_mutex_waiter_equal()
/linux-6.1.9/block/
Dblk-timeout.c86 WRITE_ONCE(req->deadline, jiffies); in blk_abort_request()
143 WRITE_ONCE(req->deadline, expiry); in blk_add_timer()
DKconfig.iosched5 tristate "MQ deadline I/O scheduler"
8 MQ version of the deadline IO scheduler.

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